Semiconductor Jobs

Semtech · Bristol

Lead a Bristol team of analog IC design engineers, spanning associate to senior level, with direct oversight of performance, development and recruitment. The role is hands-on, guiding complex design work while managing project schedules, budgets and cross-functional priorities for optical communications ICs such as laser drivers, TIAs and transceivers.

Semtech · Sevenoaks

Leads a multidisciplinary team of analog circuit and layout engineers across multiple high-speed IC product lines, owning the full NPI lifecycle from product definition to volume production. Drives tape-out, qualification, post-silicon bring-up and performance optimisation for TIAs and laser driver ICs up to 200G, working with teams in Stansted and Ottawa.

Renesas Electronics · Edinburgh

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Renesas Electronics · Swindon

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with Perforce Helix and IPLM-based data management. You will develop Linux-based engineering environments, Python and shell automation, project/workspace methodologies, and migration paths from legacy platforms, while supporting EDA tool integration and training engineering teams.

Analog Devices · Edinburgh

Work alongside experienced engineers on the design, simulation, and characterization of high-performance analog and mixed-signal ICs, including amplifiers, filters, data converters, and clocking solutions. Gain hands-on experience with Cadence and SPICE across circuit design, layout, silicon validation, and laboratory testing throughout the full IC development lifecycle.

Analog Devices · Edinburgh

Join a Consumer Audio design team in Edinburgh to work on real mixed-signal IC development, from circuit architecture research and feasibility studies to transistor-level design, simulation and verification of analog blocks. You will build testbenches, analyse trade-offs around noise, distortion and power, and collaborate with layout engineers through physical implementation and design reviews.

Dynex Semiconductor · Lincoln

Support the design, simulation and testing of high-power semiconductor assemblies, controlled rectifiers and power conversion equipment, working alongside experienced engineers from concept through customer acceptance. Uses tools such as PLECS, LTspice and MATLAB/Simulink for converter analysis, thermal calculations and validation against customer requirements.

Pragmatic Semiconductor · Cambridge

Technical leadership role owning product-level characterisation strategy, translating requirements and risks into proportionate test coverage, analysis and reporting. Leads a small team developing automated volume test solutions while hands-on with wafer-level ATE characterisation, RF/analogue test design and large-dataset analysis, presenting findings to stakeholders from project inception through production transfer.

Pragmatic Semiconductor · Stockton-on-Tees

Lead the technical development of FlexIC wafer-level packaging, chip-scale packaging, die attachment and system-in-package integration, setting technical direction and selecting materials, processes and partners. Drive the internal roadmap with Product Management, Engineering and Operations, validating scalable processes and transferring them to production teams. A newly created principal-level role spanning R&D, reliability qualification and external development partners.

Forefront RF · Cambridge

Hands-on technical lead for RF subsystem design, simulation and validation, covering circuits such as LNAs, PAs, filters and duplexers. Owns performance, quality and delivery against system architecture, runs design reviews and verification (S-parameters, NF, phase noise, EVM, ACPR), and mentors RF engineers while working with the System Architect and manufacturing teams.

BMR Solutions · Clevedon · £63,000 pa

Lead, mentor and grow a team of Electrical Engineers, driving electrical system and subsystem design from concept through to customer commissioning and field trials. Ensure compliance with safety and EMC standards, manage technical risks and validation, and promote standardisation and modularity. Works on semiconductor equipment within a hybrid Bristol-based engineering business.

The University of Manchester · Manchester · £21,805 pa

A 3.5-year funded PhD designing a Smart Network-on-Chip, an asynchronous communication fabric with intelligence built into its microarchitecture, to manage congestion in 2.5D chiplet systems. The work replaces static routing heuristics with data-driven, learning-based policies, building on an existing RTL-verified asynchronous NoC IP, with possible directions in lightweight inference engines and distributed adaptive traffic management.

Reperio Human Capital · Cork, Ireland · £103,589 – £129,486 pa

Lead and grow a verification team while remaining hands-on with mixed-signal power ICs. You define verification strategy, methodology and sign-off criteria, architect UVM/SystemVerilog environments at block, subsystem and SoC level, and own verification plans, regressions and coverage closure. Works closely with design, firmware, applications and test teams, with three days a week on site in Cork.

Cambridge GaN Devices · Cambridge

Senior leadership role owning the packaging function for GaN power semiconductors, combining people leadership with hands-on design of wirebond, flip chip and embedded packages. Involves multiphysics simulation, supplier development, qualification testing and roadmap input, working with internal teams and overseas partners from the Cambridge office.

University of Warwick · Coventry · £21,805 pa

Develops medium-voltage solid-state transformer cells for hyperscale AI data centres and net-zero grids, tackling high-frequency power conversion, compact magnetic links and electrical-thermal degradation under high-dv/dt stress. Combines multi-physics finite-element modelling in ANSYS/COMSOL with experimental validation in a high-voltage power electronics lab, culminating in a scaled hardware prototype.