Senior Layout Engineer

Job Title: Senior Layout Engineer

Location: Swindon (On-Site Working)

Salary: £55,000 - £65,000 + Bonus & Benefits (Depending on Experience)

Please Note: All Applicants must have the right to work in the UK without the need for VISA sponsorship now or in the future.

Overview:

We’re supporting a leading semiconductor technology business in the recruitment of an experienced Senior Layout Engineer to join a highly skilled, multidisciplinary engineering team.

As Senior Layout Engineer, you will take a leading role in the physical implementation of mixed-signal integrated circuits, overseeing layout, physical verification and tapeout activities.

You’ll work closely with Electronic Design Engineers and wider technical teams, providing expert guidance on layout approaches, constraints and topologies, while ensuring designs meet the required technical and manufacturing standards.

This is an excellent opportunity to contribute to innovative integrated circuit and Micro-Electro-Mechanical Systems solutions, taking complex designs from initial specification through to qualified silicon.

Job Responsibilities:

Lead and contribute to chip and block floor-planning, layout and physical verification activities.

Work closely with analogue design engineers to define, develop and refine layout solutions.

Provide expert guidance on layout topologies, constraints and area optimisation.

Collaborate with suppliers, where required, to understand and select the most appropriate process for each design.

Follow company processes and policies relating to design, documentation and the use of engineering tools.

Maintain and verify CAD tools, PDKs and associated design rules to support accurate and efficient layout development.

Contribute to wider technical activities across the engineering department as required. Required Skills & Experience:

Degree-level qualification in Physics, Engineering or a related discipline, or equivalent industry experience.

Expert-level IC layout experience, with a strong track record across 55nm–180nm processes; experience with smaller geometries would be advantageous.

Strong understanding of analogue design principles, IC design methodologies and semiconductor manufacturing processes.

Proven experience contributing to or leading layout activities across multiple successful tapeouts.

Strong problem-solving, organisational and time-management skills, with the ability to manage competing priorities in a fast-paced, multidisciplinary environment.

Experience mentoring or supervising other design professionals would be advantageous.

Proficiency in scripting languages such as Python and/or Perl, together with experience working in a Linux environment.

Excellent communication and interpersonal skills, with the ability to collaborate effectively with colleagues, suppliers and customers, supported by strong professional integrity and accountability