Principle System Engineer

Principle System Engineer with extensive FPGA (ideally using VHDL) and firmware design and development is sought on a hybrid basis by a multi award winning international engineering firm based near Gloucester.

With over 15 years of R&D and innovation in their field this Principle System engineer will be joining an R&D innovation team tasked with delivering a new breed of connectivity and monitoring solutions aimed at protecting thousands of lives.

This Principle System Engineer will be working closely with a friendly, welcoming team with extensive opportunity to take ownership of R&D concept design and development offering a unique level of technical autonomy.

This role would suit a senior system engineer looking to take on more responsibility or an existing lead looking for more autonomy and flexibility.

This Principle System Engineer based near Gloucester should have most of the following:

• Extensive experience with FPGA design using VHDL
  
• Automated VHDL testing experience
  
• Extensive de-bugging skills across software, firmware and hardware
  
• Firmware design experience - 25GBASE -X, 10GBASE-X etc
  
• testing across hardware, software and FPGA domains
  
• end to end system design experience ideally gained building proof of concepts
  
• team mentorship skills would be useful
  
• Solid agile development experience
  
  This Principle System Engineer based near Gloucester will receive:
  
  
• Salary of up to £95,000
  
• Hybrid, flexible working (2 days a week in the office)
  
• Excellent training scheme
  
• Personal development training budget
  
• Bonus scheme
  
• 25 days annual leave plus bank holidays
  
• Bi- Annual pay reviews
  
• Private medical
  
  So if you are a Principle System Engineer who would like to work with cutting edge technology within a market leading company please click apply now to be considered and for further info.
  
  Principle System Engineer
  Gloucester
  Up to £95,000
  FPGA, Field-Programmable Gate Array, RF signal processing, radio processing, system design, agile, VHDL