Semiconductor Jobs

• Oxford
• Lead · manages people

Lead a three-person electronics team within the Systems group, acting as a player-coach with roughly 60% leadership and 40% hands-on design. Own the electronics roadmap for quantum systems, from schematic capture and PCB layout through board and system-level test, including mixed-signal, high-speed digital and QPU drive architecture, while moving prototypes to rack-ready production.

Altium · Jira · Smartsheet +7

• Oxford
• Hybrid
• Senior

Lead validation and characterisation of analogue and mixed-signal ASICs for trapped-ion quantum processors, from test planning and platform development through first-silicon bring-up, debug and system integration. The role spans room-temperature and cryogenic (around 4 K) measurements on packaged parts, chip-on-board assemblies and bare die, with heavy Python automation and test PCB work.

Python · Git · SPI +7

• Cambridge
• On-site
• Senior
• Permanent

Design GaN power ICs and Si gate drivers using EDA tools, covering schematic capture, RTL, analog/digital and mixed-signal simulation, synthesis, STA, PNR and AMS verification. Also develops test solutions, analyses wafer-level and packaged device data, documents designs, debugs ICs and generates IP for patent applications within a growing R&D engineering team.

EDA Tools · GaN · Si Gate Drivers

• Cambridge
• On-site
• Director · manages people
• Permanent

Senior leadership role owning the packaging function for GaN power semiconductors, combining people leadership with hands-on design of wirebond, flip chip and embedded packages. Involves multiphysics simulation, supplier development, qualification testing and roadmap input, working with internal teams and overseas partners from the Cambridge office.

GaN

• Cambridge
• £50,000 – £60,000 pa

Deploy and verify software releases onto bespoke FPGA-accelerated Linux systems, both on-site and overseas, while leading a shift from manual system-level testing toward automation. Diagnose emergent deployment and software issues in a small Cambridge engineering team, with occasional out-of-hours support for high-availability financial systems.

Linux · GitHub · FPGA +2

• Guildford
• £38,448 – £46,970 pa
• Mid-level
• Contract

Develops and validates predictive models of source-gated and multimodal transistors on an EPSRC project, using TCAD, compact modelling, surrogate modelling or physics-informed machine learning. Works closely with experimental researchers to fit models against measured data and inform device and circuit design, producing publications and reusable simulation frameworks.

TCAD

• Cambridge
• £45,000 – £65,000 pa

Projects range from defence and security to robotics and consumer productsCambridge (fully onsite); to c£65,000 + Top BenefitsAre you interested in variety and keen to work on products that could be applied for industrial systems, UK military, or consumer products…

• Newport
• On-site
• £85 ph
• Senior
• Contract

Design, develop and verify FPGA solutions in VHDL across the full development lifecycle, from requirements capture and architecture definition to simulation, validation and hardware integration. You'll provide technical leadership within a multidisciplinary team on a Defence & Aerospace programme, using Xilinx, Altera or Microsemi devices with Vivado, Quartus II, ModelSim or Libero tooling.

Xilinx · Altera · Microsemi +5

• Swindon
• Hybrid
• Senior
• Permanent

Provides technical leadership for a global EDA/CAD compute and engineering infrastructure, spanning Linux environments, LSF batch compute, EDA license servers, Perforce and project/workspace provisioning. Combines hands-on Python and shell automation with architecture, monitoring and capacity planning, working across engineering, CAD and IT/IS teams to keep semiconductor development environments consistent and reliable worldwide.

LSF · Perforce Helix · IPLM +6

• Edinburgh
• Hybrid
• Senior
• Permanent

Provides technical leadership for a global EDA/CAD compute and engineering infrastructure, spanning Linux environments, LSF batch compute, EDA license servers, Perforce and project/workspace provisioning. Combines hands-on engineering with architecture and operational ownership, building Python and shell automation, monitoring dashboards and capacity planning. Works across engineering, CAD and IT/IS teams to keep environments scalable and globally consistent for semiconductor development.

LSF · Perforce Helix · IPLM +6

• Cork, Ireland
• Hybrid
• £86,324 – £103,589 pa
• Senior
• Permanent

Own verification of mixed-signal ICs from test planning through final sign-off, building and maintaining UVM testbenches, coverage models and regression suites. Work closely with analog and digital design teams to catch issues early, track coverage closure, and help shape the team's verification approach while supporting other engineers.

UVM · SystemVerilog · Verilog-AMS

• Middlewich
• £40,000 – £55,000 pa

Design and develop analogue and digital electronic hardware for scientific measurement instruments, working in a multi-disciplinary engineering team. Duties include FPGA and microcontroller firmware, complex multilayer surface-mount PCB design for low-noise and high-voltage applications, switching circuits, and product validation and certification for international markets (CE, UL).

Altium Designer · ARM · Xilinx +1

• Derby
• On-site
• £55,000 – £60,000 pa
• Lead
• Permanent

Lead the full FPGA development lifecycle, architecting systems for new secure communications products, capturing requirements, defining module interfaces and building test benches. Work with VHDL, TCL, Riviera Pro or QuestaSim and version control alongside a multidisciplinary team, reporting to the Head of FPGA Development.

Riviera Pro · QuestaSim · Git +1

• Derby
• On-site
• £55,000 – £60,000 pa
• Mid-level
• Permanent

Contribute across the FPGA development lifecycle, from system and module design to verification and documentation, reporting to the Head of FPGA Development. Work with VHDL, SoC technologies, simulation tools like Riviera Pro or QuestaSim, and scripting in TCL within a multidisciplinary engineering team. The role evolves with the company's technologies and may involve UK travel between sites.

Riviera Pro · QuestaSim

• Whiteley
• £50,000 – £80,000 pa
• Senior

Design and optimise capacitive sensing architectures, develop and verify RTL in Verilog/SystemVerilog, and write embedded C/C++ software for sensing and signal processing. Lead silicon bring-up, debugging and validation across analogue, digital and firmware domains, collaborating with global teams on HMI solutions.

Verilog · SystemVerilog · C/C++ +7