Latest chip verification Jobs

Senior System Architect

The Senior System Architect will define and drive end-to-end hardware architecture for AI-accelerating systems, spanning chip interfaces, interconnects, board design, and thermal management. This role involves hands-on prototyping, system bring-up, and close collaboration with digital, firmware, and software teams to ensure architectural coherence. The architect acts as a technical leader and integrator across disciplines, shaping system design from concept through production.

Fractile London, United Kingdom

Senior System Architect

Define and drive end-to-end hardware architecture from chip-level interfaces to board design and system integration. Work closely with digital, firmware, and software teams to translate architectural vision into working silicon and reliable hardware platforms. Lead prototyping, bring-up, and testing while ensuring coherence across hardware, firmware, and software layers.

Fractile Bristol, United Kingdom

Lead Physical Design Engineer

This role involves leading the end-to-end physical implementation of advanced ASIC/SoC chips, from synthesis and floorplanning to sign-off, with a focus on optimising performance, power, and area. The engineer will work closely with RTL, DFT, and process teams, using EDA tools and advanced AI techniques to enhance design quality and productivity. Full-chip ownership and collaboration across disciplines are key aspects of the position.

Fractile London, United Kingdom

On-site Permanent

Lead Physical Design Engineer

This role involves leading the end-to-end physical implementation of advanced AI accelerator chips, from synthesis and floorplanning to sign-off, with full responsibility for PPA optimisation, power integrity, and physical verification. The engineer will lead teams, mentor junior staff, and develop EDA flows using tools like Innovus and Fusion Compiler, while collaborating closely with RTL, architecture, and DFT teams. A key focus is leveraging AI-driven methodologies to enhance design quality and productivity in a tightly integrated full-stack environment.

Fractile Bristol, United Kingdom

On-site Permanent

Lead RTL Designer (PPA Experience)

Lead RTL Designer responsible for driving PPA-optimized datapath design in high-performance AI accelerator chips. The role involves deep microarchitectural trade-off analysis, timing-closure iteration, and close collaboration with physical design and verification teams. Work spans from RTL creation to synthesis and STA feedback, targeting cutting-edge inference hardware for large-scale AI models.

Fractile United Kingdom

Senior Embedded Performance Engineer

This role involves developing and optimizing low-level runtime software for a next-generation AI inference chip, focusing on performance-critical ML kernels in C and assembly. The engineer will drive early silicon evaluation, create microbenchmarks, and collaborate closely with hardware, compiler, and simulation teams to deliver measurable performance gains. Work spans from firmware-level control paths to profiling and regression tracking in a tightly integrated hardware-software environment.

Fractile London, United Kingdom

Senior Linux Kernel Driver Engineer

Design and develop high-performance Linux kernel drivers for an AI inference accelerator, focusing on PCIe, DMA, memory management, and interrupt handling. Work closely with hardware, firmware, and ML teams in a co-design environment from pre-silicon through performance optimization. Build robust, low-latency kernel-space paths and stable userspace interfaces critical to system throughput and latency.

Fractile London, United Kingdom

Semiconductor Test Engineer

Develop and debug ATE test programs for an advanced AI accelerator chip, covering digital logic, memory, and high-speed interfaces. Perform silicon bring-up, characterization, and failure analysis while collaborating with design and DFT teams. Support high-volume manufacturing ramp and advanced packaging test flows.

Fractile Bristol, United Kingdom

On-site Permanent Clearance Required

Semiconductor Test Engineering Team Leader

Lead the development and execution of manufacturing test strategies for an advanced AI accelerator chip, overseeing both internal teams and external partners. Drive test architecture, DFT integration, and silicon bring-up across high-speed interfaces like PCIe Gen6 and LPDDR, with a focus on yield, scalability, and advanced packaging. Work closely with cross-functional teams to ensure robust test coverage and successful high-volume manufacturing transfer.

Fractile Bristol, United Kingdom

On-site Permanent

Semiconductor Product Engineering Team Leader

Leads semiconductor product engineering for AI accelerator chips, driving test strategy from DFT through high-volume manufacturing. Oversees internal teams and external partners to ensure silicon readiness, yield optimization, and robust test coverage across advanced CMOS and packaging technologies. Focuses on PCIe Gen6, LPDDR, and high-speed IO interfaces in a full-stack hardware-software environment.

Fractile Bristol, United Kingdom

On-site Permanent

Silicon Infrastructure Engineer

This role involves developing and maintaining infrastructure tooling for silicon design, focusing on EDA workflows, build systems, and compute environments. The engineer will create cacheable, reproducible workflows, support EDA tools across the chip lifecycle, and manage cloud or on-premise infrastructure using IaC. Work includes deployment, monitoring, and optimisation of high-performance computing systems used by silicon engineering teams.

Fractile London, United Kingdom

Hybrid Permanent Clearance Required

Board Test Engineer

Designs and implements manufacturing test solutions for high-complexity AI accelerator boards, covering ICT, boundary scan, and functional testing. Develops MCU-based test firmware and supports test station deployment at offshore production sites. Focuses on robust, repeatable validation of high-power, high-speed PCBAs with PCIe Gen6 and advanced power delivery.

Fractile Bristol, United Kingdom

On-site Permanent Clearance Required

Thermo Mechanical Engineer

Design and lead the development of advanced cooling systems for high-density AI accelerator hardware, integrating Direct-to-Chip liquid cooling and rack-level thermal management. Collaborate with cross-functional teams and external suppliers to model, test, and validate thermal performance across chip, chassis, and data centre environments. Drive design from concept through production with a focus on reliability, manufacturability, and real-world deployment.

Fractile Bristol, United Kingdom

Senior Silicon Substrate & Packaging Manufacturing Engineer

This role focuses on driving the manufacturing execution of advanced silicon substrates and packaging in Taiwan, ensuring high yield and rapid ramp from early validation to high-volume production. The engineer will lead problem-solving with OSATs and substrate suppliers, establish scalable manufacturing processes, and ensure reliability under demanding AI workloads. Success hinges on deep technical ownership, data-driven quality control, and building robust, scalable supply chain partnerships.

Fractile United Kingdom

On-site Permanent Clearance Required