Semiconductor Jobs

Analog Devices · Newbury

Lead the architecture and transistor-level design of mixed-signal ICs such as ADCs, DACs, PLLs and SerDes PHY subsystems for advanced FinFET SoC products. The role sits in the Advanced Cores Group, combining architectural decision-making, design reviews, layout and test guidance with mentoring of junior engineers.

Semtech · Bristol

Owns test strategy and architecture for major semiconductor product lines on the Advantest V93000 platform, writing test plans and coverage objectives rather than executing someone else's. Leads complex test program development, statistical and adaptive test methods, yield and quality improvement, and test technology roadmaps while mentoring engineers. Hybrid role based in Bristol with Monday–Thursday onsite and up to 20% travel.

Semtech · Bristol

Develop, deploy and optimise wafer and package-level test solutions on the Advantest V93000 platform, covering test development, characterisation, qualification support and production ramp-up. Work closely with design, product engineering and offshore OSAT partners across the full product lifecycle, with a focus on high-speed mixed-signal ICs, DFT and yield/test-time improvement.

Wolviston Management Services · Newton Aycliffe

Integrate individual semiconductor processes into stable, repeatable manufacturing flows that support high yield and product quality. Work with Process, Device, Design, Quality and Production teams across the product lifecycle, from development and qualification to production ramp-up, using SPC, DOE and FMEA in a cleanroom environment.

Analog Devices · Hayes

Field Application Engineer supporting regional accounts across the UK, working with Account Managers and Business Unit specialists to solve complex application-level problems and drive design wins. Involves building customer relationships, identifying new business opportunities, training customers and presenting at seminars, with around 10% travel.

Renesas Electronics · Edinburgh

Design and verify CMOS analog blocks such as amplifiers, oscillators, LDOs, comparators and reference/biasing circuits for custom ASICs, balancing performance, area, power and timescale. The role carries technical leadership of sub-systems from specification through to production ramp, guiding layout, DFT and test engineers, driving silicon debug and lab evaluation, and mentoring less experienced team members.

Wolviston Management Services · Newton Aycliffe

Generates, verifies and releases MMIC integrated circuit layouts and mask reticle designs within a Design Services team, taking designs from concept through to mask release. Liaises with customers, engineers, programme managers and external mask manufacturers, and maintains reticle records and design archives. Uses CAD layout tools such as KLayout, L-Edit or Nazca Design.

ARCA · Nailsea

Designs and develops electrical modules and sub-assemblies for specialist environmental technology systems used in semiconductor manufacturing, taking products from initial design through verification and documentation. Works within a multidisciplinary team, selecting components, running calculations and tests, and producing models, drawings and bills of materials to machinery safety and industry standards.

Vacgen · East Sussex

Bridges design and manufacture, supporting New Product Introduction and developing manufacturing routes, BOMs and ERP data. Designs vacuum chambers, fixtures and tooling in 3D CAD, produces drawings and documentation, and drives continuous improvement using 8D, DFMEA, PFMEA and PPAP. Works hands-on with shop floor, customers and suppliers on ultra-high vacuum technology.

Redline Group · Glasgow · £80,000 – £110,000 pa

Lead a multi-disciplinary team of up to 100 people, driving pure NPI development for next-generation semiconductor products. Responsibilities include creating project proposals, presenting to customers, providing technical leadership across hardware, software and mechanical teams, and managing project schedules, budgets and resource allocation. Works closely with the General Manager on complex, electronically biased product development.

Cambridge GaN Devices · Cambridge

Define and architect test hardware for GaN power devices and ICs, covering fixtures, sockets, probing, switching and multi-site parallel setups for static, dynamic and mixed-signal measurements. Lead test hardware workstreams from concept to release, write specifications, review designs, and mentor engineers while shaping the test equipment roadmap.

Renesas Electronics · Edinburgh

Lead the design and verification of CMOS analog blocks for custom mixed-signal ASICs, taking technical ownership of full-chip or major system-level blocks from specification through to production ramp. The role combines hands-on circuit design with mentoring a team of engineers, working alongside digital, layout, DFT and test teams, and driving silicon debug and characterisation.

University of Surrey · Guildford · £38,448 – £46,970 pa

Develops and validates predictive models of source-gated and multimodal transistors on an EPSRC project, using TCAD, compact modelling, surrogate modelling or physics-informed machine learning. Works closely with experimental researchers to fit models against measured data and inform device and circuit design, producing publications and reusable simulation frameworks.

Forefront RF · Cambridge

Owns and develops the Quality Management System to ISO 9001 standards, establishing scalable quality and reliability processes for new product introduction, qualification and manufacturing ramp. Leads reliability testing, failure analysis and root cause investigations while managing quality relationships with foundries, OSATs and test providers, and supports customer qualification requirements.

Cambridge GaN Devices · Cambridge

Senior leadership role owning the packaging function for GaN power semiconductors, combining people leadership with hands-on design of wirebond, flip chip and embedded packages. Involves multiphysics simulation, supplier development, qualification testing and roadmap input, working with internal teams and overseas partners from the Cambridge office.