Semiconductor Jobs

Analog Devices · Edinburgh

Work alongside experienced engineers on the design, simulation, and characterization of high-performance analog and mixed-signal ICs, including amplifiers, filters, data converters, and clocking solutions. Gain hands-on experience with Cadence and SPICE across circuit design, layout, silicon validation, and laboratory testing throughout the full IC development lifecycle.

Analog Devices · Edinburgh

Join a collaborative Edinburgh team developing low-power analog and power-management IP for highly integrated mixed-signal ICs. The intern contributes to architecture, transistor-level design, simulation and verification of DC/DC converter IP such as buck, boost and buck-boost topologies, including analog sub-circuits like error amplifiers, comparators and gate drivers. Work spans behavioural modelling, layout review and potentially laboratory silicon evaluation.

Renesas Electronics · Edinburgh

Owns verification of complex digital and mixed-signal ASIC designs, building SystemVerilog/UVM testbenches and running block-level to full-chip simulation, coverage and regression. Includes gate-level simulation with SDF timing annotation and mentoring junior engineers. Hybrid role with three set office days in Edinburgh.

Semtech · Sevenoaks

Designs analogue and mixed-signal subsystems for high-speed TIA and laser driver ICs supporting data rates up to 200G, taking ownership of blocks from concept through validation and volume production. Works with layout, verification and product teams on performance, power and area targets, using Cadence tools within a Stansted and Ottawa design centre.

Cambridge GaN Devices · Cambridge

Design and layout of GaN power ICs using EDA tools, covering schematic capture, analog simulation, chip layout review, PEX and PLS. The role also involves wafer-level and packaged device testing, SPICE model development, and supporting patent and IP management within a growing R&D engineering team.

Cambridge GaN Devices · Cambridge

Design GaN power ICs and Si gate drivers using EDA tools, covering schematic capture, RTL, analog/digital and mixed-signal simulation, synthesis, STA, PNR and AMS verification. Also develops test solutions, analyses wafer-level and packaged device data, documents designs, debugs ICs and generates IP for patent applications within a growing R&D engineering team.

Semtech · Sevenoaks · CA$95,000 – CA$122,000 pa

Owns new product introduction for high-speed analog and mixed-signal ICs, from concept through volume manufacturing and end-of-life. Defines DfT/DfM requirements, drives ATE test program development, PVT characterisation, ATE-to-bench correlation, yield analysis and DOE-based optimisation. Works cross-functionally with design, test, quality and operations, and mentors junior engineers.

Renesas Electronics · Edinburgh

Support the design and verification of analog integrated circuit blocks, from transistor-level schematic capture and simulation through layout review and debug. Work alongside experienced engineers on real silicon projects, documenting and presenting findings to the team.

Reperio Human Capital · Cork, Ireland · £86,324 – £103,589 pa

Own verification of mixed-signal ICs from test planning through final sign-off, building and maintaining UVM testbenches, coverage models and regression suites. Work closely with analog and digital design teams to catch issues early, track coverage closure, and help shape the team's verification approach while supporting other engineers.

Redline Group · Glasgow · £80,000 – £110,000 pa

Lead a multi-disciplinary team of up to 100 people, driving pure NPI development for next-generation semiconductor products. Responsibilities include creating project proposals, presenting to customers, providing technical leadership across hardware, software and mechanical teams, and managing project schedules, budgets and resource allocation. Works closely with the General Manager on complex, electronically biased product development.

University of Warwick · Coventry · £21,805 pa

Develops medium-voltage solid-state transformer cells for hyperscale AI data centres and net-zero grids, tackling high-frequency power conversion, compact magnetic links and electrical-thermal degradation under high-dv/dt stress. Combines multi-physics finite-element modelling in ANSYS/COMSOL with experimental validation in a high-voltage power electronics lab, culminating in a scaled hardware prototype.

Pragmatic Semiconductor · Durham

Operate die prep tools and equipment, perform wafer inspection under a microscope, handle wafers and carry out manual tag assembly on a continental shift pattern. Work to SOPs, run process checks and keep activity logs in a lab environment, with full training provided and no formal qualifications required.

Pragmatic Semiconductor · Durham

Support 300mm wafer fabs by introducing new process technology, ramping yield and providing RMA support. Monitor electrical performance, SPC and OOC parameters, run DOEs and drive defect characterisation and root-cause analysis. Work closely with process integration, principal engineers and cross-functional teams on high-volume manufacturing.

Enterprise Recruitment · Towcester · £60,000 – £65,000 pa

This role involves hands-on engineering support for production operations, maintaining and improving epitaxy equipment, and driving continuous improvement initiatives. You will coordinate maintenance, support equipment upgrades, and collaborate with cross-functional teams to ensure high equipment uptime and compliance with safety standards.

NSR Associates · Denmark · £79,200 – £87,500 pa

Commercial management of a major megawatt data centre for a Tier 1 main contractor, working with the Project Director, Commercial Director, construction teams, consultants and supply chain. Covers change management, cost control, forecasting, procurement and commercial reporting across the project lifecycle, with progression potential into senior commercial leadership.