Staff Digital Design Engineer

A fantastic opportunity has arisen for a Staff Digital IC Design Engineer to join an established Technology company in Cambridge, working on the development of digital functions for mixed-signal products.

This role will take responsibility for digital IC design throughout the development lifecycle, from product definition and architecture through RTL development, verification, synthesis, physical implementation, timing closure and production maturity.

Key Responsibilities:

* Develop functional digital blocks and contribute to complete mixed-signal ASICs from initial definition through to full production maturity.

* Support product definition and architecture activities, including feasibility studies and the development of digital blocks for FPGA emulation.

* Complete RTL design in SystemVerilog to meet system and product requirements.

* Develop comprehensive block-level test benches to verify digital functionality.

* Create behavioural models and top-level test benches to support system-level verification, regression and production test functions.

* Complete digital synthesis using appropriate physical constraints to achieve required power, performance and area (PPA) targets.

* Define and implement DFT architectures, including scan insertion, ATPG and test-point insertion to achieve required test coverage.

* Oversee digital place-and-route activities and ensure post-layout timing closure.

* Produce accurate and comprehensive technical documentation and actively participate in design reviews.

* Provide technical leadership and oversight to other members of the digital design team.

* Take a leading role in improving digital design methodologies, processes and best practices across the organisation.

The ideal candidate would have:

* An MSc, MEng or PhD in Electronics Engineering or a related subject.

* A minimum of 5 years’ experience in digital IC design using standard-cell libraries.

* In-depth knowledge and understanding of best-practice digital design methodologies.

* Strong experience delivering fully synthesised digital designs through RTL and logic synthesis flows.

* Experience working with SystemVerilog and industry-standard digital EDA tools.

* Familiarity with design constraints and automated place-and-route flows.

* A strong understanding of production test requirements and digital test methodologies.

* Experience with digital power optimisation techniques.

* Experience debugging digital functions in a laboratory environment using suitable test equipment, including mixed-signal oscilloscopes.

* Experience using scripting languages such as TCL and/or Python.

* A proven ability to produce accurate, complete and well-structured technical documentation.

If this role looks like your next challenge, please contact Ben ASAP or apply via this advert!

We endeavour to reply to every candidate, every time but if you haven’t heard back within 10 days, please understand that you have unfortunately been unsuccessful for this position, or the position has been filled