Senior Staff Digital IC Design Engineer

MicroTech Consulting
Cambridgeshire, United Kingdom
Today
£65,000 – £95,000 pa

Salary

£65,000 – £95,000 pa

Job Type
Permanent
Work Pattern
Full-time
Work Location
On-site
Seniority
Senior
Education
Masters
Posted
3 Jun 2026 (Today)

Role Overview:

  • Have in depth knowledge and understanding of best-practice digital design methods.
  • Be an expert at executing designs via a fully synthesised digital design flow with RTL and logic synthesis.
  • Be fully conversant with the SystemVerilog standard and digital EDA tools.
  • Be familiar with the use of constraints and the automatic place-and-route flow for the physical design.
  • Understand the importance of production test and have experience of design methods to maximize digital test coverage such as scan.
  • Have experience of design techniques for optimising digital power consumption.
  • Have experience of debugging digital functions in a lab using suitable test equipment (e.g. mixed-signal oscilloscopes).
  • Have experience with scripting languages such as TCL/Python.
  • Have experience producing accurate and complete documentation.


Key Responsibilities:

  • Development of functional digital blocks and contribution to complete mixed signal ASICs from definition to full production maturity.
  • Support the Product Definition team with feasibility study, product architecture definition and digital blocks design for FPGA emulation.
  • Complete RTL design in SystemVerilog of digital functions to meet all system requirements.
  • Create suitable block-level test benches for comprehensive verification of all digital blocks.
  • Create suitable behavioural models and top-level test benches for comprehensive verification and regression of all system-level functions and production test functions.
  • Complete digital synthesis with suitable physical constraints to meet all PPA requirements.
  • Define and implement DFT architecture. Perform scan insertion, ATPG and insert test points to achieve the required test coverage.
  • Oversee digital place-and-route, and ensure post-layout timing closure.
  • Generate all necessary design documentation and participate in design reviews.
  • Lead and oversee other team members to achieve the above.
  • Take a lead in digital design methodology improvements within the company

Experience Required:

  • MSc/MEng or PhD in Electronics Engineering or related subject.
  • Minimum 8 years’ experience in digital IC design using standard cell libraries.

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