FPGA Design Engineer

World Class Defence Organisation is currently looking to recruit 3x FPGA Design Engineer Subcontractors on an initial 12 month contract.

Rate: £90.00 per hour

Overtime Rate: Hours worked over the standard 37 hours per week, will be paid at ‘time and a quarter’

Location: Stevenage or Bristol depending on your preference

Hybrid / Remote working: 3 days min on site, other 2 remote. However, at times, there could be requirement for fully on site (depending on workload)

Duration: 12 Months with very likely extension. Contracts are often ongoing and long-term thereafter.

IR35 status: Inside IR35 (Umbrella)

Interview process: One stage video interview

FPGA Design Engineer Job Description:

For this role, we are seeking an experienced FPGA design and verification engineer (~4+ years), to support the development of our growing portfolio of complex FPGA projects. The current portfolio ranges from advanced signal processing systems (ImageRadio), core embedded processing systems, through to safety & security critical systems.

Responsibilities:

The role involves working at all phases of the FPGA design and verification cycle; hence, the candidate would be responsible some of the following key activities:

Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices.

Verifying complex FPGA implementations using VHDL and System VerilogUVM test-bench methodologies.

Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim).

Generating low-level software (C) to facilitate FPGA test and integration with the wider embedded system.

Configuring and Documenting designs to a high professional standard.

Working as part of a multidiscipline team to deliver complex FPGA based projects.

Skillset/experience required:

Ideally we are looking for candidates that are degree qualified (or equivalent) with significant experience in FPGA development.

Competent VHDL Language and Design Skills.

Competent Verification Skills using VHDL and SystemVerilog methodologies

A deep proven level of experience designing for Xilinx, Intel or Microsemi FPGAs

Experience of professionally configuring and documenting designs

Experience of working as part of a large multidiscipline team