FPGA Design Engineer (Junior to Senior) - South Coast

Morgan McKinley
Hampshire, United Kingdom
Today
£35,000 – £70,000 pa

Salary

£35,000 – £70,000 pa

Seniority
Senior
Posted
10 Sep 2026 (Today)

Job Title: FPGA Engineer (Junior to Senior - Multiple Openings)

Location: Hampshire

Salary: Flexible / Dependent on Experience + Comprehensive Benefits Package

Industry: Defence & Security Technology

Employment Type: Full-time, Permanent

About the Opportunity

A market-leading innovator within the Defence and Security sector is expanding its specialist electronics team. We are seeking talentedFPGA Engineers across all experience levels-from promising Junior Engineers looking to accelerate their careers, to Mid-level Developers and seasoned Senior/Lead Architects-to work on high-reliability, mission-critical processing platforms.

If you thrive on tackling complex signal processing, high-speed interface challenges, and robust hardware design in a secure, state-of-the-art environment, this is an exceptional opportunity to join a premier technical division.

Key Responsibilities
  • Design, implement, and verify complex FPGA-based solutions using VHDL, Verilog, or SystemVerilog across the full engineering lifecycle.

  • Conduct logic synthesis, place-and-route, constraint creation, and timing closure on high-density FPGA devices.

  • Build robust simulation testbenches and automated verification environments to ensure high-reliability performance.

  • Participate in hands-on hardware bring-up, lab integration, and signal integrity debugging using logic analyzers, oscilloscopes, and spectrum analyzers.

  • Work collaboratively with cross-functional teams spanning Hardware, Embedded Software, Systems, and RF engineering.

  • (Senior Levels): Lead FPGA system architecture definition, conduct code/design reviews, and mentor junior team members.

What We Are Looking ForCore Technical Requirements
  • Education: Degree (BSc/MSc/PhD) in Electronic Engineering, Computer Science, Embedded Systems, or a related discipline.

  • RTL Development: Strong foundational knowledge or commercial experience inVHDL,Verilog, orSystemVerilog.

  • FPGA Toolchains: Hands-on familiarity with major vendor toolsets (e.g., AMD/Xilinx Vivado, Intel/Altera Quartus, or Microchip/Microsemi).

  • Protocols & Interfaces: Exposure to protocols such as PCIe, AXI, Ethernet, SPI, I2C, DDR memory controllers, or DSP algorithms.

  • Verification: Experience with simulation tools (ModelSim, Questa, Vivado Simulator) and verification methodologies.

Experience Level Breakdown
  • Junior FPGA Engineer: Strong academic grounding or 1+ years of entry-level commercial experience in digital design; eager to learn under senior mentorship.

  • Mid-Level FPGA Engineer: Proven track record of delivering FPGA modules into production hardware, timing closure, and lab bring-up experience.

  • Senior / Principal FPGA Engineer: Demonstrated expertise in system-level FPGA architecture, high-speed design, complex verification frameworks, and technical leadership.

Security Clearance & Eligibility

Due to the sensitive nature of the projects, candidates must hold or be eligible to achieve standard Security Clearance (e.g., UK SC Clearance / National Security Vetting).

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