Semiconductor Jobs

• Cambridge
• On-site
• £45,000 – £55,000 pa
• Mid-level

Own significant blocks of RTL from specification through implementation, verification and into working hardware, focused on physical layer design in the communications space. Work alongside senior and principal engineers on digital RF and fixed-point DSP, with hands-on lab time on AMD/Xilinx FPGA platforms. A new role in a small, established team with low attrition.

AMD · Xilinx · MATLAB

• Stevenage
• Hybrid
• £40,000 – £60,000 pa

Works across the full embedded development lifecycle, from system design and functional partitioning through to implementation, integration and testing. Involves FPGA, embedded software and digital hardware for DSP, image processing, complex SoC and safety-critical applications, including modelling performance and testing on hardware platforms within multi-disciplinary teams.

FPGA · DSP · SoC

• Edinburgh
• Senior

Implements and verifies digital logic for mixed-signal SoCs used in high-performance power systems, covering RTL development, synthesis, static timing analysis and DFT insertion. Works with analog, firmware and validation teams on integration, silicon bring-up and lab debug, with scope to improve methodology and automation.

Genus · Innovus · Tempus +4

• Portsmouth
• Hybrid · 1–2 days in office
• £82 ph
• Mid-level
• Contract

Designs production-ready digital electronics, covering component selection, simulation, schematic capture and PCB layout guidance. Develops FPGA/CPLD solutions in VHDL and verifies designs through simulation, analysis and test, including EMC and system bring-up. Works within a multi-disciplinary Mission Systems team on defence electronics, supporting peer and formal design reviews.

FPGA · CPLD · VHDL +4

• Manchester
• £50,000 – £57,000 pa
• Senior
• Permanent

Designs analogue and digital circuits, schematics and PCB layouts for advanced scientific instrumentation, working alongside physicists, software and mechanical engineers. Owns designs from specification through prototyping, testing and volume manufacture, with FPGA work and high-speed digital design. Based in a collaborative R&D team supporting products across their full lifecycle.

Altium · Cadstar · VHDL +4

• Edinburgh
• Hybrid · 3 days in office
• Senior
• Permanent

Owns verification of complex digital and mixed-signal ASIC designs, building SystemVerilog/UVM testbenches and running block-level to full-chip simulation, coverage and regression. Includes gate-level simulation with SDF timing annotation and mentoring junior engineers. Hybrid role with three set office days in Edinburgh.

Synopsys VCS · Cadence Xcelium · Tcl +4

• Edinburgh
• Entry level
• Internship

Join a Consumer Audio design team in Edinburgh to work on real mixed-signal IC development, from circuit architecture research and feasibility studies to transistor-level design, simulation and verification of analog blocks. You will build testbenches, analyse trade-offs around noise, distortion and power, and collaborate with layout engineers through physical implementation and design reviews.

Cadence Virtuoso · Spectre · MATLAB +3

• Coventry
• Hybrid
• £40,000 – £60,000 pa
• Mid-level
• Permanent

Work across the full FPGA design cycle, from requirements analysis and specification through RTL design, implementation and verification. Define module architectures, run synthesis and timing analysis, and integrate FPGAs into target hardware, using VHDL or Verilog and leading vendor tools alongside senior engineers and system architects.

• Whitstable

FPGA Design EngineerLocation: Whitstable, KentJob Type: Full-time | PermanentSalary: Highly competitive, depending on experienceBenefits* Flexible working hours* 25 days holiday plus bank holidays* Company pension* Free on-site parking* Ongoing technical development* Genuine opportunity to influence product design* Small, highly skilled…

• Bristol

Integrate IP and subsystems into top-level SoC designs, maintaining build and configuration environments while running synthesis, linting, CDC/RDC and timing checks. Work closely with verification and physical design teams on clean interface hand-offs, debug integration issues across hierarchies, and improve automation flows using Python, Tcl, SystemVerilog or VHDL.

SystemVerilog · VHDL · Python +1

• Stevenage
• Hybrid
• £85 – £90 ph
• Mid-level
• Contract

Design and verify complex FPGA architectures for defence and security systems, working across the full lifecycle with VHDL, Simulink and SystemVerilog/UVM testbenches. Targets Xilinx, Intel and Microsemi devices, using QuestaSim/ModelSim and low-level C for embedded integration within a multidisciplinary team.

Xilinx · Intel · Microsemi +3

• Stevenage
• Hybrid
• £70,000 – £85,000 pa
• Lead · manages people

Lead a team of FPGA and digital design engineers while providing hands-on technical direction across FPGA architecture, RTL design, simulation, synthesis, timing closure and hardware validation. Own project execution including planning, estimation, scheduling and risk management, and work with Systems, Software, Hardware and Verification teams to deliver integrated solutions from concept through to production.

FPGA · VHDL · Verilog +1

• United Kingdom
• £300 – £600 pd

Hands-on verification role covering subsystem and SoC functional verification, reusing and enhancing System Verilog/UVM testbenches, and developing processor-based C tests. The engineer runs regressions, debugs complex RTL simulation failures with waveform tools, and drives functional coverage closure while collaborating on verification planning.

SystemVerilog · UVM · Python +2

• Edinburgh
• Hybrid
• Lead
• Permanent

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Perforce Helix · Methodics IPLM · Cadence Virtuoso +4

• Dundee
• £40,000 – £55,000 pa
• Senior
• Permanent

Design and develop embedded electronics for electromechanical products used by banks and retailers worldwide, owning designs from schematic through to test while staying hands-on at the bench. Work within a small hardware team, debug to component level, and mentor junior engineers.

Cadence Allegro · Altium Designer · DDR +4