Semiconductor Jobs

Pragmatic Semiconductor · Cambridge

Executes verification strategies for mixed-signal IP and FlexICs to ensure right-first-time tapeouts, working closely with digital and analog designers. Builds test bench environments, debugs failures, and produces verification reports and coverage statistics across the design flow. Requires strong SystemVerilog and verification methodology knowledge, with UVM highly desirable.

Graphcore · Bristol

Owns verification of complex AI compute silicon, ensuring RTL matches architecture specifications. Plans verification, defines coverage, generates tests, diagnoses failures and improves shared infrastructure, working closely with Architecture, Logical Design and Physical Design teams across multiple UK sites.

Hexwired Recruitment Limited · Southampton · £65,000 – £85,000 pa

Verification of RTL implementations to ensure designs meet required standards before deployment, working with SystemVerilog and UVM in a Linux environment. The role sits within an expanding electronics manufacturer and involves scripting in Python, TCL or Bash alongside digital ASIC/FPGA verification work.

Analog Devices · Newbury

Join the CSS design verification team to validate IP and subsystem-level designs for high-performance semiconductor products. You will develop System Verilog/UVM testbenches, run simulations, debug failures, and track functional and assertion coverage alongside design and architecture engineers.

Analog Devices · Edinburgh

Hands-on internship in a design verification team, validating IP and subsystem-level designs for high-performance semiconductor products. You will develop System Verilog/UVM testbenches, run simulations, debug failures, create directed and constrained-random tests, and track functional, code and assertion coverage while supporting regression automation with scripting.

IonQ · Oxford

Architect and maintain UVM/SystemVerilog verification environments for complex FPGA designs, defining verification plans with constrained-random testing and functional coverage. Build automated regression suites and CI pipelines, collaborating with RTL engineers to debug and ensure reliable quantum control systems.

Reperio Human Capital · Cork, Ireland · £86,324 – £103,589 pa

Own verification of mixed-signal ICs from test planning through final sign-off, building and maintaining UVM testbenches, coverage models and regression suites. Work closely with analog and digital design teams to catch issues early, track coverage closure, and help shape the team's verification approach while supporting other engineers.

Cadence · Edinburgh

Develops verification and emulation environments for complex Chiplet designs, building UVM-SV scoreboards, functional coverage, and SystemVerilog assertions for formal and simulation. Integrates Cadence VIP and accelerated VIP, manages vPlans in vManager, and maintains automated regression environments using Jenkins and GIT within an experienced Chiplet team.

Renesas Electronics · Edinburgh

Owns verification of complex digital and mixed-signal ASIC designs, building SystemVerilog/UVM testbenches and running block-level to full-chip simulation, coverage and regression. Includes gate-level simulation with SDF timing annotation and mentoring junior engineers. Hybrid role with three set office days in Edinburgh.

Reperio Human Capital · Cork, Ireland · £103,589 – £129,486 pa

Lead and grow a verification team while remaining hands-on with mixed-signal power ICs. You define verification strategy, methodology and sign-off criteria, architect UVM/SystemVerilog environments at block, subsystem and SoC level, and own verification plans, regressions and coverage closure. Works closely with design, firmware, applications and test teams, with three days a week on site in Cork.

Tatton Recruitment · Stevenage · £90 ph

World Class Defence Organisation is currently looking to recruit 3x FPGA Design Engineer Subcontractors on an initial 12 month contract.Rate: £90.00 per hourOvertime Rate: Hours worked over the standard 37 hours per week, will be paid at ‘time and a...

Tatton Recruitment · Filton · £90 ph

World Class Defence Organisation is currently looking to recruit 3x FPGA Design Engineer Subcontractors on an initial 12 month contract.Rate: £90.00 per hourOvertime Rate: Hours worked over the standard 37 hours per week, will be paid at ‘time and a...

MASS · Lincoln · £60,000 – £70,000 pa

Principal FPGA Engineer- North Hykeham (LN6) - Permanent - HybridUp to £70,000 depending on experienceWe’re growing our Electronic Warfare Operations Support Group (EWOS), a team of over 60 specialists from a wide range of backgrounds. Our engineers, scientists, and ex-military...

Teledyne FLIR · Chelmsford

Hands-on role spanning clean-room and office work, owning verification and test across space and science imaging detector projects. You define test flows, commission and script EGSE/OGSE/MGSE equipment, run functional, electrical, mechanical and environmental campaigns to ECSS standards, and train operations staff. Works closely with project, product assurance and manufacturing teams.

ECM Selection · Cambridge · £50,000 – £60,000 pa

Deploy and verify software releases onto bespoke FPGA-accelerated Linux systems, both on-site and overseas, while leading a shift from manual system-level testing toward automation. Diagnose emergent deployment and software issues in a small Cambridge engineering team, with occasional out-of-hours support for high-availability financial systems.