120 jobs for “test engineer”
Graphcore
Support the facilities behind AI hardware bring-up, validation and characterisation in Bristol laboratories. You'll perform preventative maintenance, calibrate and troubleshoot test equipment, manage assets, handle board and cable modifications, and shape standard operating procedures while mentoring junior colleagues.
Oscilloscopes · Logic Analysers · Power Supplies +4
Graphcore
Owns verification of complex AI compute silicon, ensuring RTL matches architecture specifications. Plans verification, defines coverage, generates tests, diagnoses failures and improves shared infrastructure, working closely with Architecture, Logical Design and Physical Design teams across multiple UK sites.
UVM · SVA · Git +2
Tatton Recruitment
Design and verify complex FPGA architectures for defence projects spanning signal processing, embedded processing and safety-critical systems. Work across the full design and verification cycle using VHDL, SystemVerilog UVM, Simulink and Mentor toolsets targeting Xilinx, Intel and Microsemi devices, plus low-level C for test and integration. Part of a large multidiscipline team, with hybrid working and occasional fully on-site periods.
Xilinx · Intel · Microsemi +3
Morgan Jones Recruitment Consultants
Hands-on FPGA design role covering the full development lifecycle, from requirements and VHDL design through simulation, verification, synthesis, timing closure and hardware testing. You'll work in a small, cross-disciplinary team on advanced electronic systems for high-reliability applications, with genuine ownership of designs and input into product release.
AMD · Xilinx · Intel +7
Renesas Electronics
Owns verification of complex digital and mixed-signal ASIC designs, building SystemVerilog/UVM testbenches and running block-level to full-chip simulation, coverage and regression. Includes gate-level simulation with SDF timing annotation and mentoring junior engineers. Hybrid role with three set office days in Edinburgh.
Synopsys VCS · Cadence Xcelium · Tcl +4
Tatton Recruitment
Work across all phases of the FPGA design and verification cycle for complex projects spanning advanced signal processing, embedded processing and safety/security critical systems. You'll generate architectures and implementations in VHDL and Simulink targeting Xilinx, Intel and Microsemi devices, verify them with VHDL, SystemVerilog and UVM testbenches, and write low-level C for test and integration within a multidiscipline team.
Xilinx · Intel · Microsemi +3
Semtech
Lead bench PVT characterization for high-speed optical and electrical signal integrity products, developing automated test environments and analyzing complex datasets. Work with an international team across the UK, Canada, US and Mexico, using Python automation and mentoring junior engineers in a lab-based NPI role.
Python
Cadence
Develops and maintains a C++ codebase for next-generation EDA tools, focusing on computational geometry, geometry manipulation and algorithmic complexity for sub-20nm IC design. Involves writing design, function and test specifications, interfacing with build and regression systems, and collaborating with a global cross-functional team.
Qt · Linux · Unix
IonQ · 501–1000 people · Public
Lead validation and characterisation of analogue and mixed-signal ASICs for trapped-ion quantum processors, from test planning and platform development through first-silicon bring-up, debug and system integration. The role spans room-temperature and cryogenic (around 4 K) measurements on packaged parts, chip-on-board assemblies and bare die, with heavy Python automation and test PCB work.
Python · Git · SPI +7
IonQ · 501–1000 people · Public
Architect and maintain UVM/SystemVerilog verification environments for complex FPGA designs, defining verification plans with constrained-random testing and functional coverage. Build automated regression suites and CI pipelines, collaborating with RTL engineers to debug and ensure reliable quantum control systems.
SystemVerilog · UVM · Python
Octagon Group
Lead technical integration of advanced semiconductor and touch products into customer devices, combining hands-on circuit design, prototype tooling and system validation. Provide remote and on-site support to global customers, guide regional application teams, mentor engineers and coordinate project planning and documentation.
Cadence
Develops verification and emulation environments for complex Chiplet designs, building UVM-SV scoreboards, functional coverage, and SystemVerilog assertions for formal and simulation. Integrates Cadence VIP and accelerated VIP, manages vPlans in vManager, and maintains automated regression environments using Jenkins and GIT within an experienced Chiplet team.
Cadence Palladium · Cadence VIP · Cadence vManager +3
Analog Devices
Work alongside experienced engineers on the design, simulation, and characterization of high-performance analog and mixed-signal ICs, including amplifiers, filters, data converters, and clocking solutions. Gain hands-on experience with Cadence and SPICE across circuit design, layout, silicon validation, and laboratory testing throughout the full IC development lifecycle.
Cadence · SPICE · Oscilloscopes +3
Analog Devices
Implements and verifies digital logic for mixed-signal SoCs used in high-performance power systems, covering RTL development, synthesis, static timing analysis and DFT insertion. Works with analog, firmware and validation teams on integration, silicon bring-up and lab debug, with scope to improve methodology and automation.
Genus · Innovus · Tempus +4
Wolviston Management Services
Characterise and model compound semiconductor devices, developing compact models for GaN and GaAs technologies and running DC, pulsed I-V, noise and small/large-signal RF testing. You will build and validate MMIC Process Design Kits, support customer design queries and work with design engineers on new process development. Requires UK nationality and security clearance.
IC-CAP · ADS · Microwave Office +2
