95 jobs for “Device Design Engineer”
Analog Devices
Join the CSS design verification team to validate IP and subsystem-level designs for high-performance semiconductor products. You will develop System Verilog/UVM testbenches, run simulations, debug failures, and track functional and assertion coverage alongside design and architecture engineers.
SystemVerilog · Verilog · UVM +7
Analog Devices
Hands-on internship in a design verification team, validating IP and subsystem-level designs for high-performance semiconductor products. You will develop System Verilog/UVM testbenches, run simulations, debug failures, create directed and constrained-random tests, and track functional, code and assertion coverage while supporting regression automation with scripting.
SystemVerilog · Verilog · UVM +7
Semtech
Design high-speed validation PCBs in Cadence Allegro, from schematic capture and stack-up definition through layout and release, for silicon operating at 25Gbit/s and above. Bring up, debug and characterise RF and data comms boards on the bench, automate measurements in Python, and write validation reports that directly influence what ships.
Cadence Allegro
Lumai
Owns dense, high-layer-count PCB layout from schematic handoff to fabrication release, covering stackups, HDI structures, controlled-impedance routing, differential pairs and BGA breakout for large FPGAs and custom ASICs. Acts as the main technical contact with fabricators and assembly houses, and sets the footprint libraries, design rules and CAD standards the team works to.
Cadence Allegro · Altium · Gerber +7
Graphcore
Hands-on lab role validating and debugging memory and system interfaces on advanced AI compute hardware, focusing on LPDDR5-9600, slow-speed interfaces, PCB issues, power behaviour and signal integrity. You own board bring-up, root cause analysis and memory subsystem tuning, working closely with architecture, silicon, firmware and PCB design teams.
LPDDR5-9600 · Oscilloscopes · BERT +2
Langham Recruitment · 1–10 people · Not available
Designs and simulates photonic components and Photonic Integrated Circuits for next-generation networking applications, working with foundries and external partners on fabrication and delivery. Builds experimental test environments and measurement methods to characterise packaged photonic devices, analysing results to drive performance improvements. Requires hands-on optical lab work and PIC design using tools such as Lumerical or IPKISS.
Lumerical · IPKISS
Belcan · 1001–5000 people · Late stage
Design, develop and verify FPGA solutions in VHDL across the full development lifecycle, from requirements capture and architecture definition to simulation, validation and hardware integration. You'll provide technical leadership within a multidisciplinary team on a Defence & Aerospace programme, using Xilinx, Altera or Microsemi devices with Vivado, Quartus II, ModelSim or Libero tooling.
Xilinx · Altera · Microsemi +5
Matchtech
Design and implement FPGA functionality in VHDL for advanced embedded communication products, verifying designs through simulation, testing and hardware validation. Work alongside software, electronics, RF and systems engineers across the full product lifecycle, integrating FPGAs with processors and embedded software and resolving system-level issues in existing products.
AMD/Xilinx · Vivado · Embedded Linux +2
Morson Edge
Responsible for executing allocated FPGA work packages within cost, time and quality constraints, from requirements analysis and architectural design through VHDL implementation, verification and integration onto target platforms. Also provides technical support, reviews team members' work and contributes to FPGA development process updates. Requires proficiency in VHDL, simulation and synthesis tools, with recent experience of Altera, Microsemi or Xilinx devices.
Altera · Xilinx · Microsemi +5
Octagon Group
Lead technical integration of advanced semiconductor and touch products into customer devices, combining hands-on circuit design, prototype tooling and system validation. Provide remote and on-site support to global customers, guide regional application teams, mentor engineers and coordinate project planning and documentation.
SoCode
Own FPGA logic for controller boards at the heart of the company's hardware, covering design, verification and maintenance. Work is VHDL-based on Xilinx Artix-7 parts in Vivado, spanning state machines, I²C/SPI driver logic, self-checking test benches and hands-on lab bring-up. Sits at the discrete-logic and embedded-interfaces level rather than SoC development.
Xilinx Artix-7 · Vivado · SVN +2
Verso Recruitment
Lead the integration and validation of advanced touch technologies into customer devices, acting as the key technical interface between global customers and internal engineering teams. The role combines hands-on circuit design, Python scripting and hardware tooling with technical leadership, mentoring and international travel.
Cambridge GaN Devices · 11–50 people · Series B
Senior leadership role owning the packaging function for GaN power semiconductors, combining people leadership with hands-on design of wirebond, flip chip and embedded packages. Involves multiphysics simulation, supplier development, qualification testing and roadmap input, working with internal teams and overseas partners from the Cambridge office.
GaN
Graphcore
Owns sub-system architecture for highly integrated AI silicon, translating product requirements into specifications, models and validation plans. Assesses third-party hard and soft IP, works with vendors on integration, and supports silicon bring-up and characterisation. Sits within a silicon architecture team reporting to the Director of Silicon Architecture, mentoring engineers and representing the team in cross-functional groups.
Teledyne FLIR
Assembly and test operator role ensuring timely throughput of imaging devices while meeting quality requirements. Duties include microscope inspection, setting up and running tools, maintaining production records and reporting progress to the line manager, working in a cleanroom on alternating double day shifts.
