Semiconductor Jobs

• Durham
• Lead

Lead technical efforts to sustain and improve high-volume back-end assembly processes, from wafer release on glass to outgoing quality inspection. Drive yield, quality and equipment effectiveness through root cause investigations, SPC and DOEs, supporting product transfers and the ramp to volume manufacturing alongside cross-functional teams.

JMP

• Durham
• On-site
• Mid-level
• Permanent · Shift work

Responsible for maintaining, installing and fault-finding 300mm photolithography equipment including steppers, wafer tracks and bake tools, while supporting production operators and minimising tool downtime. Involves training technicians, developing maintenance procedures and reporting on equipment KPIs within a cleanroom semiconductor scale-up environment.

300mm Semiconductor Equipment · MES · PLC +7

• Bristol

Design, implement and optimise software that connects Graphcore accelerators with ML frameworks such as Triton and PyTorch. Working in the Frameworks team, you deliver new features, review code, write documentation and collaborate with upstream open-source communities, with deep technical ownership across a complex stack.

Triton · PyTorch · JAX +1

• Newport
• £85 ph
• Senior · manages people
• Contract

Responsible for executing allocated FPGA work packages within cost, time and quality constraints, covering requirements analysis, architectural and detailed design, implementation, verification and integration onto target platforms. Requires proficiency in VHDL, simulation and synthesis tools, with recent experience of Altera, Microsemi or Xilinx devices, plus technical support and review of team members' work.

Altera · Microsemi · Xilinx

• Stevenage
• Hybrid · 3 days in office
• £90 ph
• Mid-level
• Contract

Design and verify complex FPGA architectures for defence projects spanning signal processing, embedded processing and safety-critical systems. Work across the full design and verification cycle using VHDL, SystemVerilog UVM, Simulink and Mentor toolsets targeting Xilinx, Intel and Microsemi devices, plus low-level C for test and integration. Part of a large multidiscipline team, with hybrid working and occasional fully on-site periods.

Xilinx · Intel · Microsemi +3

• Bassaleg
• £85 – £100 ph
• Senior · manages people
• Contract

Responsible for executing allocated FPGA work packages within cost, time and quality constraints, from requirements analysis and architectural design through VHDL implementation, verification and integration onto target platforms. Also provides technical support, reviews team members' work and contributes to FPGA development process updates. Requires proficiency in VHDL, simulation and synthesis tools, with recent experience of Altera, Microsemi or Xilinx devices.

Altera · Xilinx · Microsemi +5

• Filton
• Hybrid · 3 days in office
• £90 ph
• Mid-level
• Contract

Work across all phases of the FPGA design and verification cycle for complex projects spanning advanced signal processing, embedded processing and safety/security critical systems. You'll generate architectures and implementations in VHDL and Simulink targeting Xilinx, Intel and Microsemi devices, verify them with VHDL, SystemVerilog and UVM testbenches, and write low-level C for test and integration within a multidiscipline team.

Xilinx · Intel · Microsemi +3

• Newbury
• On-site
• Senior

Field Applications Engineer role focused on system-level engagement with Aerospace, Defense and Communications customers at ADI's Newbury Catalyst site. You will develop and execute pilot demos using evaluation boards, system platforms and COTS modules, write Python code to tailor solutions, and work on-site with customers customising radar, electronic warfare and sensing designs. Part of the wider European System Platforms team, feeding customer insights back into future ADI products.

MATLAB · Python · COTS Modules

• Dereham
• On-site
• Shift work

Provide first-line engineering support for wafer fabrication and epitaxy process tools, handling fault diagnosis, repairs and preventative maintenance on lithography, etch, PVD, PECVD and MOVPE reactor systems. Work a continental 12-hour shift pattern in a safety-critical cleanroom, managing vacuum, pneumatic, mechanical, electrical and RF systems plus chemical and specialty gas supplies. Open to Armed Forces technical trades and aerospace/defence backgrounds, with training provided.

Lithography · Etch · PVD +6

• Oxford
• Lead · manages people

Lead a three-person electronics team within the Systems group, acting as a player-coach with roughly 60% leadership and 40% hands-on design. Own the electronics roadmap for quantum systems, from schematic capture and PCB layout through board and system-level test, including mixed-signal, high-speed digital and QPU drive architecture, while moving prototypes to rack-ready production.

Altium · Jira · Smartsheet +7

• Newport
• On-site
• £85 ph
• Senior
• Contract

Design, develop and verify FPGA solutions in VHDL across the full development lifecycle, from requirements capture and architecture definition to simulation, validation and hardware integration. You'll provide technical leadership within a multidisciplinary team on a Defence & Aerospace programme, using Xilinx, Altera or Microsemi devices with Vivado, Quartus II, ModelSim or Libero tooling.

Xilinx · Altera · Microsemi +5

• Edinburgh
• Senior · manages people
• Permanent

Define test strategies for mixed-signal ICs and develop software and hardware test solutions on ATE platforms such as Advantest V93K, Cohu DiamondX and Teradyne UltraFLEX. The role covers silicon characterisation, production testing, correlation and release at production facilities, plus leading the test development project and mentoring junior engineers.

Advantest V93K · Cohu DiamondX · Teradyne UltraFLEX +2

• Bristol

Owns verification of complex AI compute silicon, ensuring RTL matches architecture specifications. Plans verification, defines coverage, generates tests, diagnoses failures and improves shared infrastructure, working closely with Architecture, Logical Design and Physical Design teams across multiple UK sites.

UVM · SVA · Git +2

• Oxford
• Hybrid
• Senior
• Permanent

Owns dense, high-layer-count PCB layout from schematic handoff to fabrication release, covering stackups, HDI structures, controlled-impedance routing, differential pairs and BGA breakout for large FPGAs and custom ASICs. Acts as the main technical contact with fabricators and assembly houses, and sets the footprint libraries, design rules and CAD standards the team works to.

Cadence Allegro · Altium · Gerber +7

• Cambridge
• On-site
• Mid-level
• Permanent

Design, verify and validate FPGA solutions for optical networking products, implementing VHDL logic on Xilinx Artix-7 devices using Vivado. Work spans requirements capture, test benches, timing closure, CDC analysis and lab bring-up with logic analysers, collaborating closely with electronics and software engineers.

Xilinx Artix-7 · Vivado · SVN +2