Semiconductor Jobs

• Bristol
• Hybrid · 4 days in office
• Senior

Architect test strategies for high-speed mixed-signal and RF SiGe products, from first silicon to mass production, covering 200Gbps+ SerDes, CDRs and signal conditioning. Sets DFT and testability standards, builds reusable test IP, and leads NPI transfers to high-volume OSATs while mentoring engineers.

Advantest V93000 · SmarTest 7/8 · C/C++ +7

• Bristol
• Senior

Develop manufacturing test solutions for complex compute systems, shaping how hardware is tested across Host Processor Modules, server blades, and multi-node racks. Build test software, design test approaches, and diagnose hardware issues while working with hardware, firmware, software, and manufacturing teams to improve test coverage.

Linux · OpenBMC

• Bristol
• Lead

Lead advanced manufacturing test strategy for complex circuit board assemblies, defining methods and evaluation criteria across optical and X-ray inspection, in-circuit test, boundary scan and functional test. Set direction, mentor engineers and work closely with design, manufacturing, silicon and CEM partners to improve defect coverage and diagnostic resolution.

JTAG 1149.x · iJTAG · MDA +1

• Bristol
• Hybrid · 4 days in office
• Senior

Drive validation strategy for next-generation high-speed semiconductor devices, architecting end-to-end test solutions spanning software, hardware and documentation. Build Python or LabVIEW automation, take precision lab measurements at 10Gbit/s and above, and apply signal integrity expertise to schematic entry and PCB layout in Altium. Lead validation reviews and mentor engineers within a Bristol R&D team.

Python · LabVIEW · Altium

• Edinburgh
• Entry level
• Permanent

Support silicon evaluation and applications engineering, working hands-on with real devices, evaluation boards and lab equipment. The intern collects and analyses measurement data, debugs device and board issues, and develops scripts for automated measurements alongside experienced engineers.

Oscilloscopes · Digital Multimeters · Power Supplies +1

• Edinburgh
• Senior · manages people
• Permanent

Lead the design and verification of CMOS analog blocks for custom mixed-signal ASICs, taking technical ownership of full-chip or major system-level blocks from specification through to production ramp. The role combines hands-on circuit design with mentoring a team of engineers, working alongside digital, layout, DFT and test teams, and driving silicon debug and characterisation.

Cadence · EDA

• Southampton
• £30,000 – £75,000 pa
• Mid-level

Hands-on FPGA Engineer role in Southampton, owning the full FPGA lifecycle from design and VHDL simulation to system-level integration and verification. You'll work with SoC devices such as Zynq UltraScale+ and toolchains like Vivado, Quartus and ModelSim, collaborating with system and electronic engineers on high-reliability products.

Vivado · Quartus · ModelSim +1

• Cambridge
• Hybrid · 3–4 days in office
• £75,000 – £85,000 pa
• Permanent

Own FPGA logic for controller boards at the heart of the company's hardware, covering design, verification and maintenance. Work is VHDL-based on Xilinx Artix-7 parts in Vivado, spanning state machines, I²C/SPI driver logic, self-checking test benches and hands-on lab bring-up. Sits at the discrete-logic and embedded-interfaces level rather than SoC development.

Xilinx Artix-7 · Vivado · SVN +2

• Farnborough
• Hybrid · 4 days in office
• Permanent

End-to-end FPGA engineering role covering requirements, architecture, implementation, verification and system-level test for secure digital design products. You'll lead FPGA delivery into production, develop testbenches, manage external IP suppliers, and coordinate other engineers within a multi-disciplinary team. Hybrid working, four days onsite in Farnborough, in a UK SC-cleared environment.

Microchip · Libero · ModelSim +7

• Cambridge
• Hybrid
• £35,000 – £45,000 pa
• Mid-level

Develops FPGA and embedded firmware for high-performance data acquisition and signal processing systems used in biomedical research. Writes VHDL for FPGA functionality and C for low-level hardware control, integrating and debugging digital electronics alongside hardware and software engineers. Offers real project ownership and a progression route to senior engineering roles.

AMD Vivado · Xilinx Vivado · Intel Quartus +5

• Edinburgh
• £30,000 – £40,000 pa
• Entry level

Join a disruptive semiconductor company designing and validating high-speed digital electronics, FPGA solutions and embedded software. You will build automated test and characterisation rigs in Python, support customer evaluations and demonstrations, and represent the company at trade shows and on international customer visits.

Altium · OrCAD

• Oldham
• £40,000 – £45,000 pa

Owns reliability testing, failure analysis and lifetime modelling for semiconductor devices, developing and executing test plans and driving root-cause solutions for failure mechanisms. Works across design, test and manufacturing teams to improve product robustness, with programming used to write reliability test programs and handle customer returns.

• Farnborough
• Mid-level

Own FPGA solutions end to end, from requirements elicitation and architecture through VHDL design, verification and production. Work in a multi-disciplinary team on secure digital and cyber/information assurance systems, integrating custom and industry-standard interfaces and debugging on hardware. Involves test benches, system-level testing, vendor and third-party IP liaison, and possible coordination of other FPGA engineers.

Libero · ModelSim · QuestaSim +7

• Didcot
• Hybrid · 4 days in office
• £41,000 – £67,000 pa
• Senior
• Contract

Develops, tests and optimises FPGA firmware in VHDL or Verilog for next-generation control systems and power electronics, including interfaces to ADCs, DACs, memory and microcontrollers. Involves simulation, verification, lab-based hardware debugging and collaboration with hardware, software and systems engineers. Senior applicants can lead development activities and mentor others.

Xilinx · LTspice · PSpice +6

• Bristol
• Remote
• £50 – £60 ph
• Senior

Verification of a next-generation multi-die SoC, covering subsystem- and SoC-level functional verification with SystemVerilog/UVM and processor-driven C test programs on embedded cores. Involves adapting existing UVM environments, debugging RTL simulation failures, running regressions and driving functional coverage closure, with scripting in Python, Perl or shell.

SystemVerilog · UVM · ARM +3