Semiconductor Jobs

• Oxford
• Hybrid
• Junior
• Permanent

Builds firmware, peripheral drivers and RTOS-based control software for an optical AI accelerator, covering RTOS tasks and IPC, board support package bring-up, boot loaders and first-boot debugging on custom hardware. Works closely with a senior embedded engineer and hardware teams, writing unit and integration tests and maintaining embedded CI pipelines.

FreeRTOS · Zephyr · JTAG +7

• Oxford
• Hybrid · 3 days in office
• Senior

Integrate all features needed to operate quantum computers into complex multi-layer chips, guiding designs from requirements through layout and tape-out. Work with scientists and fabrication engineers on ion trapping chips, handling metal-track routing and photonics/CMOS interfaces. Hybrid role, three days per week in the Oxford office.

GDSFactory · Cadence

• Oxford
• Hybrid
• Senior

Owns the full lifecycle of electrical reliability fixes on operational trapped-ion quantum computers, from triaging and root-causing control and drive-electronics faults to designing, prototyping and retrofitting permanent solutions. Works across Operations, Science and Manufacturing on fleet-wide upgrades, standardising hardware and building telemetry to reduce downtime.

Altium · ADC · DAC +2

• Oxford
• Hybrid
• Senior · manages people
• Permanent

Owns a Python-based performance and power modelling framework predicting how photonic AI hardware runs real inference workloads, covering compute engines, interconnect, memory and bridge interfaces. Characterises operators against hardware, RTL or emulation, builds compiler-agnostic MLIR interfaces and runs benchmarks to give architecture and compiler teams a shared source of truth.

Python · MLIR · UL Procyon +7

• Edinburgh
• Lead

Develops verification and emulation environments for complex Chiplet designs, building UVM-SV scoreboards, functional coverage, and SystemVerilog assertions for formal and simulation. Integrates Cadence VIP and accelerated VIP, manages vPlans in vManager, and maintains automated regression environments using Jenkins and GIT within an experienced Chiplet team.

Cadence Palladium · Cadence VIP · Cadence vManager +3

• Cambridge
• On-site
• Senior
• Permanent

Design and layout of GaN power ICs using EDA tools, covering schematic capture, analog simulation, chip layout review, PEX and PLS. The role also involves wafer-level and packaged device testing, SPICE model development, and supporting patent and IP management within a growing R&D engineering team.

EDA Tools · SPICE · GaN

• Bristol
• On-site
• Mid-level · manages people

Owns the safe, reliable operation of Graphcore's Bristol electronics labs, managing test equipment, lab infrastructure, ESD controls, goods in/out, maintenance planning and technical readiness. Builds and mentors a technician team supporting hardware bring-up, validation, characterisation and product test, working closely with Facilities, Supply Chain, Quality and Hardware Engineering.

• Bristol
• Senior

Leading role supporting NPI development and volume production of complex AI hardware, providing DfM feedback on PCB and system design and working closely with contract manufacturers. Drives yield improvement, analyses production data and resolves L6 manufacturing issues, with travel to Taiwan to work alongside suppliers.

JMP · SQL · Python +2

• Northampton
• Senior

Provide technical and engineering support to Epitaxy Shift Equipment Engineers and Technicians, maintaining and troubleshooting MOVPE and MOCVD equipment including Veeco and Aixtron reactors. Duties cover preventative maintenance, chamber strip/clean, trap and gas cylinder changes using SCBA, equipment upgrades and installations, plus supervising external contractors in a semiconductor cleanroom environment.

Veeco · Aixtron · Microsoft Office +3

• Northamptonshire
• Senior

Provide technical and engineering support to Epitaxy Shift Equipment Engineers and Technicians, maintaining Veeco and Aixtron MOVPE/MOCVD equipment, troubleshooting complex faults including bioreactors, and leading improvements, upgrades and installations. The role involves process gas systems, hazardous materials and SCBA use, plus supervising contractors and driving preventative maintenance in a semiconductor fab cleanroom.

Veeco · Aixtron · Microsoft Office +1

• Edinburgh
• On-site
• Entry level
• Internship

Work alongside experienced engineers on the design, simulation, and characterization of high-performance analog and mixed-signal ICs, including amplifiers, filters, data converters, and clocking solutions. Gain hands-on experience with Cadence and SPICE across circuit design, layout, silicon validation, and laboratory testing throughout the full IC development lifecycle.

Cadence · SPICE · Oscilloscopes +3

• Cambridge
• On-site
• £45,000 – £55,000 pa
• Mid-level

Own significant blocks of RTL from specification through implementation, verification and into working hardware, focused on physical layer design in the communications space. Work alongside senior and principal engineers on digital RF and fixed-point DSP, with hands-on lab time on AMD/Xilinx FPGA platforms. A new role in a small, established team with low attrition.

AMD · Xilinx · MATLAB

• Cambridgeshire
• £70,000 – £100,000 pa
• Senior

Own the full RF lifecycle within a multidisciplinary team of subject matter experts, designing, building and testing complex RF-based systems for aerospace, robotics and IoT applications. Work spans sensors for autonomous drones, space-based radars and mission-critical comms, using anechoic chambers and spectrum/network analysis equipment. Requires expert microwave, RF and analogue design and simulation skills.

Anechoic Chambers · Spectrum Analysers · Network Analysers

• Didcot
• Hybrid · 4 days in office
• £41,414 – £67,481 pa
• Senior
• Contract

Develop and debug HDL firmware for Xilinx FPGAs in Vivado, implementing full-cycle designs for magnet power supplies on the Diamond-II upgrade, including feedback control, filtering and interlock state machines. Work with ADCs, DACs, memory and microcontrollers, verifying designs via simulation and on-hardware testing, and collaborate with hardware and control engineers on Ethernet-based interfaces.

Xilinx · Vivado · MATLAB +7

• Towcester
• On-site
• £60,000 – £65,000 pa
• Senior
• Permanent

Hands-on engineering support for epitaxy equipment in a semiconductor fab, covering maintenance, fault finding, repairs and continuous improvement to maximise uptime. Coordinates maintenance, equipment upgrades and new tool installations, working with process engineering, operations and facilities. Also leads technical initiatives, guides technicians and liaises with external suppliers.

MOVPE · MOCVD · PLC