Lead Physical Design Engineer
This role involves leading the end-to-end physical implementation of advanced AI accelerator chips, from synthesis and floorplanning to sign-off, with full responsibility for PPA optimisation, power integrity, and physical verification. The engineer will lead teams, mentor junior staff, and develop EDA flows using tools like Innovus and Fusion Compiler, while collaborating closely with RTL, architecture, and DFT teams. A key focus is leveraging AI-driven methodologies to enhance design quality and productivity in a tightly integrated full-stack environment.