Semiconductor Jobs

• Durham
• Senior

Lead the development, qualification and transfer of back-end semiconductor assembly processes into high-volume manufacturing, with particular focus on laser processing, die singulation, wafer-on-frame debonding and advanced packaging. Design and execute DOEs, set process windows and control plans, and mentor engineers while supporting new product introductions and customer-driven transfers.

JMP · Minitab · Excel

• Stockton-on-Tees
• Lead

Lead the technical development of FlexIC wafer-level packaging, chip-scale packaging, die attachment and system-in-package integration, setting technical direction and selecting materials, processes and partners. Drive the internal roadmap with Product Management, Engineering and Operations, validating scalable processes and transferring them to production teams. A newly created principal-level role spanning R&D, reliability qualification and external development partners.

FlexIC · MEMS · JEDEC +3

• Dereham
• Senior

Provide technical and engineering support to Epitaxy Shift Equipment Engineers and Technicians, maintaining Veeco and Aixtron MOVPE/MOCVD equipment, troubleshooting complex faults including bioreactors, and leading improvements, upgrades and installations. The role involves process gas systems, hazardous materials and SCBA use, plus supervising contractors and driving preventative maintenance in a semiconductor fab cleanroom.

Veeco · Aixtron · Microsoft Office +1

• Newton Aycliffe
• On-site
• £53,350 pa
• Mid-level
• Permanent

Carry out planned and preventative maintenance, respond to breakdowns and perform electrical, electronic and mechanical fault finding on sophisticated semiconductor production equipment. Work within a multi-skilled engineering team alongside Process Engineering, supporting continuous improvement, major fault investigations and the training of fellow technicians and apprentices.

PLC

• Bristol
• Senior

Owns new product introduction for high-speed analog and mixed-signal ICs, from concept through volume manufacturing. Defines DfT/DfM requirements, runs ATE-to-bench correlation and PVT characterization, and drives yield, test-time and cost optimization with design, test and foundry teams. Also mentors junior engineers and leads failure analysis and corrective actions.

Excel · JMP · Galaxy +6

• Sevenoaks
• Hybrid · 4 days in office
• CA$95,000 – CA$122,000 pa
• Senior

Owns new product introduction for high-speed analog and mixed-signal ICs, from concept through volume manufacturing and end-of-life. Defines DfT/DfM requirements, drives ATE test program development, PVT characterisation, ATE-to-bench correlation, yield analysis and DOE-based optimisation. Works cross-functionally with design, test, quality and operations, and mentors junior engineers.

Excel · JMP · Galaxy +6

• Newton Aycliffe
• Mid-level

Integrate individual semiconductor processes into stable, repeatable manufacturing flows that support high yield and product quality. Work with Process, Device, Design, Quality and Production teams across the product lifecycle, from development and qualification to production ramp-up, using SPC, DOE and FMEA in a cleanroom environment.

GaAs · GaN

• Southampton
• Hybrid
• £70,000 – £80,000 pa
• Senior

Develops and optimises low-level C/C++ for a 5G physical-layer platform, working on x86 and ARM with real-time signal processing, PCIe and hardware/software integration. Sits alongside software, algorithm and hardware engineers tackling latency, throughput and compute efficiency close to the metal.

x86 · ARM · PCIe +5

• Bristol
• £23 – £24 ph
• Mid-level
• Contract

Drive quality improvements across manufacturing, engineering and supplier operations, maintaining the ISO 9001:2015 QMS, conducting internal and supplier audits, and managing SCARs. Investigate non-conformances, support NPI and First Article Inspections, and monitor KPIs with Power BI reporting. Based in Bristol on an initial six-month contract within a leading engineering and manufacturing business.

Power BI · SharePoint · Microsoft Office +2

• Didcot
• Hybrid · 4 days in office
• £41,414 – £67,481 pa
• Senior
• Contract

Develop and debug HDL firmware for Xilinx FPGAs in Vivado, implementing full-cycle designs for magnet power supplies on the Diamond-II upgrade, including feedback control, filtering and interlock state machines. Work with ADCs, DACs, memory and microcontrollers, verifying designs via simulation and on-hardware testing, and collaborate with hardware and control engineers on Ethernet-based interfaces.

Xilinx · Vivado · MATLAB +7

• Newton Aycliffe
• Mid-level

Generates, verifies and releases MMIC integrated circuit layouts and mask reticle designs, taking them from initial concept through to mask release. Works in a Design Services team, producing mask order documentation and reticle records while liaising with engineers, programme managers, customers and external mask manufacturers.

KLayout · L-Edit · Nazca Design +2

• Bedford
• On-site
• £43,000 – £55,000 pa
• Senior

Take mixed electrical and electronic designs from concept to completion within a structured phase-gate process, covering analogue, digital, microprocessor and FPGA design, power electronics, simulation, test and PCB layout. Work on defence and aerospace hardware for harsh environments, using Altium, JTAG debug and Windchill, with ownership of processes, supplier reviews and compliance documentation.

Altium · Windchill · PLM +1

• Cambridge
• On-site
• Permanent

Hands-on role driving semiconductor assembly and packaging for RF products, working with OSATs and manufacturing partners on process development. Supports new product introduction, yield improvement, root-cause analysis, reliability testing and qualification, and maintains assembly documentation and process flows. Newly created position shaping the transition from prototype to volume production.

OSAT

• Oxford
• Hybrid
• Junior
• Permanent

Builds firmware, peripheral drivers and RTOS-based control software for an optical AI accelerator, covering RTOS tasks and IPC, board support package bring-up, boot loaders and first-boot debugging on custom hardware. Works closely with a senior embedded engineer and hardware teams, writing unit and integration tests and maintaining embedded CI pipelines.

FreeRTOS · Zephyr · JTAG +7

• Cambridge
• Hybrid · 3–4 days in office
• £75,000 – £85,000 pa
• Permanent

Own FPGA logic for controller boards at the heart of the company's hardware, covering design, verification and maintenance. Work is VHDL-based on Xilinx Artix-7 parts in Vivado, spanning state machines, I²C/SPI driver logic, self-checking test benches and hands-on lab bring-up. Sits at the discrete-logic and embedded-interfaces level rather than SoC development.

Xilinx Artix-7 · Vivado · SVN +2