Senior/Principal Physical Design Engineer
This role involves leading the physical implementation of advanced ASIC/SoC designs for AI accelerators, from synthesis through to sign-off. The engineer will focus on optimizing performance, power, and area using state-of-the-art EDA tools and deep expertise in low-power design and timing closure. Collaboration with RTL, DFT, and process teams is key to ensuring design integrity and manufacturability at advanced nodes.