Semiconductor Jobs

Cambridge GaN Devices · Cambridge

Design GaN power ICs and Si gate drivers using EDA tools, covering schematic capture, RTL, analog/digital and mixed-signal simulation, synthesis, STA, PNR and AMS verification. Also develops test solutions, analyses wafer-level and packaged device data, documents designs, debugs ICs and generates IP for patent applications within a growing R&D engineering team.

Cambridge GaN Devices · Cambridge

Senior leadership role owning the packaging function for GaN power semiconductors, combining people leadership with hands-on design of wirebond, flip chip and embedded packages. Involves multiphysics simulation, supplier development, qualification testing and roadmap input, working with internal teams and overseas partners from the Cambridge office.

IonQ · Oxford

Integrate all features needed to operate quantum computers into complex multi-layer ion-trapping chips, guiding designs from requirements through layout and tape-out. Work closely with scientists and fabrication engineers on metal-track routing and photonics/CMOS interfaces, using GDSFactory in Python and Cadence. Hybrid role, three days per week in the Oxford office.

IonQ · Oxford

Owns full-chip mixed-signal modelling and verification for cryo-CMOS ASICs used in trapped-ion quantum processors, building Verilog-A/AMS and real-number models correlated against schematic and measured silicon. Leads AMS methodology, sign-off criteria and reviews, runs Cadence AMS/Xcelium-Spectre co-simulation regressions, and mentors engineers through tape-out and bring-up.

Belcan · Newport · £85 ph

Owns the full FPGA development lifecycle on a defence and aerospace programme, from requirements capture and architecture through VHDL implementation, verification and integration onto target hardware. Also leads and mentors other engineers, manages work packages to cost and quality targets, and reports progress to engineering leadership. Based fully on-site in Newport under SC clearance.

Belcan · Newport · £85 ph

Design, develop and verify FPGA solutions in VHDL across the full development lifecycle, from requirements capture and architecture definition to simulation, validation and hardware integration. You'll provide technical leadership within a multidisciplinary team on a Defence & Aerospace programme, using Xilinx, Altera or Microsemi devices with Vivado, Quartus II, ModelSim or Libero tooling.

Renesas Electronics · Swindon

Provides technical leadership for a global EDA/CAD compute and engineering infrastructure, spanning Linux environments, LSF batch compute, EDA license servers, Perforce and project/workspace provisioning. Combines hands-on Python and shell automation with architecture, monitoring and capacity planning, working across engineering, CAD and IT/IS teams to keep semiconductor development environments consistent and reliable worldwide.

Renesas Electronics · Edinburgh

Provides technical leadership for a global EDA/CAD compute and engineering infrastructure, spanning Linux environments, LSF batch compute, EDA license servers, Perforce and project/workspace provisioning. Combines hands-on engineering with architecture and operational ownership, building Python and shell automation, monitoring dashboards and capacity planning. Works across engineering, CAD and IT/IS teams to keep environments scalable and globally consistent for semiconductor development.

Lumai · Oxford

Owns dense, high-layer-count PCB layout from schematic handoff to fabrication release, covering stackups, HDI structures, controlled-impedance routing, differential pairs and BGA breakout for large FPGAs and custom ASICs. Acts as the main technical contact with fabricators and assembly houses, and sets the footprint libraries, design rules and CAD standards the wider team works to.

Lumai · Oxford

Owns signal and power integrity across high-speed boards and packages, running pre-layout channel studies, post-layout SI analysis with IBIS-AMI models, and PDN impedance and DC drop work for high-current ASIC and FPGA rails. Channels span chip, package, interposer, board and optical engine, with heavy bench correlation using VNAs, TDRs and oscilloscopes to feed design rules.

Eclectic Recruitment · Stevenage · £45,000 – £53,000 pa

Designs board-level electronics including power and control circuitry for FPGA and SoC systems, working with RF and missile subsystems across the full product lifecycle. Takes ownership of complex design work packages, runs proving activities against requirements, and supports products from concept through to production transfer within a multi-disciplinary team.

Reperio Human Capital · Cork, Ireland · £86,324 – £103,589 pa

Own verification of mixed-signal ICs from test planning through final sign-off, building and maintaining UVM testbenches, coverage models and regression suites. Work closely with analog and digital design teams to catch issues early, track coverage closure, and help shape the team's verification approach while supporting other engineers.

Semtech · Bristol

Drive validation strategy for next-generation high-speed semiconductor devices, architecting end-to-end test solutions spanning software, hardware and documentation. Build Python or LabVIEW automation, take precision lab measurements at 10Gbit/s and above, and apply signal integrity expertise to schematic entry and PCB layout in Altium. Lead validation reviews and mentor engineers within a Bristol R&D team.

Semtech · Bristol

Graduate role validating next-generation high-speed semiconductor devices, working hands-on in the lab from week one. You'll build test automation in Python or LabVIEW, take measurements on components running at 10Gbit/s and above, and learn high-speed signal integrity with Altium PCB tools. Based in Bristol, hybrid with four days in office.

Pragmatic Semiconductor · Durham

Support 300mm wafer fabs by introducing new process technology, ramping yield and providing RMA support. Monitor electrical performance, SPC and OOC parameters, run DOEs and drive defect characterisation and root-cause analysis. Work closely with process integration, principal engineers and cross-functional teams on high-volume manufacturing.