Semiconductor Jobs

76 jobs for “Semiconductor Design Engineer”

Results

Analog Design Engineering Intern (Power Management)

Last week

Analog Devices Edinburgh

Join a collaborative Edinburgh team developing low-power analog and power-management IP for highly integrated mixed-signal ICs. The intern contributes to architecture, transistor-level design, simulation and verification of DC/DC converter IP such as buck, boost and buck-boost topologies, including analog sub-circuits like error amplifiers, comparators and gate drivers. Work spans behavioural modelling, layout review and potentially laboratory silicon evaluation.

On-site Internship Clearance Required

Staff Design Verification Engineer

Last month

Analog Devices Edinburgh

Contribute to pre-silicon verification of analog and mixed-signal products, covering top-level DMS SV/UVM, gate-level simulation, and metric-driven AMS simulations. Bridge verification and validation environments to support post-silicon validation while establishing and improving verification flows and models for a global multi-disciplinary team.

Clearance Required

Staff Design Verification Engineer

7 months ago

Renesas Electronics Edinburgh

Owns verification of complex digital and mixed-signal ASIC designs, building SystemVerilog/UVM testbenches and running block-level to full-chip simulation, coverage and regression. Includes gate-level simulation with SDF timing annotation and mentoring junior engineers. Hybrid role with three set office days in Edinburgh.

Hybrid Permanent

Analog IC Design Engineer

5 months ago

Semtech Sevenoaks

Designs analogue and mixed-signal subsystems for high-speed TIA and laser driver ICs supporting data rates up to 200G, taking ownership of blocks from concept through validation and volume production. Works with layout, verification and product teams on performance, power and area targets, using Cadence tools within a Stansted and Ottawa design centre.

Hybrid

Principal Analog IC Design Engineer

7 months ago

Semtech Sevenoaks

Leads the design and development of high-speed analog ICs from concept through to volume production, acting as technical authority on circuit architecture and chip subsystems. Works across Stansted and Ottawa design centres on transimpedance amplifiers and laser drivers for datacentres, 5G and fibre-to-the-home, mentoring junior engineers and collaborating with cross-functional teams.

Intern, Analog

5 days ago

Renesas Electronics Edinburgh

Support the design and verification of analog integrated circuit blocks, from transistor-level schematic capture and simulation through layout review and debug. Work alongside experienced engineers on real silicon projects, documenting and presenting findings to the team.

On-site Permanent

Principal Advanced Packaging Engineer (R&D)

Last week

Pragmatic Semiconductor Stockton-on-Tees

Lead the technical development of FlexIC wafer-level packaging, chip-scale packaging, die attachment and system-in-package integration, setting technical direction and selecting materials, processes and partners. Drive the internal roadmap with Product Management, Engineering and Operations, validating scalable processes and transferring them to production teams. A newly created principal-level role spanning R&D, reliability qualification and external development partners.

Lead Electrical Engineer - A&D

Last week

BMR Solutions Clevedon £63,000 pa

Lead, mentor and grow a team of Electrical Engineers, driving electrical system and subsystem design from concept through to customer commissioning and field trials. Ensure compliance with safety and EMC standards, manage technical risks and validation, and promote standardisation and modularity. Works on semiconductor equipment within a hybrid Bristol-based engineering business.

Hybrid Permanent

Optical Systems Engineer

3 weeks ago

Redline Group Torquay £60,000 – £75,000 pa

Design, develop, integrate and validate complex optical and photonic systems within a multidisciplinary engineering team, working from concept through to production. Involves optical modelling, simulation, tolerance analysis, requirements capture and verification, plus customer and supplier collaboration. Senior-level candidates take on technical leadership, mentoring and design reviews.

Engineering Manager

Last week

Redline Group Glasgow £80,000 – £110,000 pa

Lead a multi-disciplinary team of up to 100 people, driving pure NPI development for next-generation semiconductor products. Responsibilities include creating project proposals, presenting to customers, providing technical leadership across hardware, software and mechanical teams, and managing project schedules, budgets and resource allocation. Works closely with the General Manager on complex, electronically biased product development.

On-site Permanent
Cambridge GaN Devices logo

Senior Test Development Engineer

3 days ago

Cambridge GaN Devices Cambridge

Define and architect test hardware for GaN power devices and ICs, covering fixtures, sockets, probing, switching and multi-site parallel setups for static, dynamic and mixed-signal measurements. Lead test hardware workstreams from concept to release, write specifications, review designs, and mentor engineers while shaping the test equipment roadmap.

On-site Permanent

PhD in Smart Network-on-Chip Design for Congestion Management in 2.5D Chiplet Systems

5 days ago

The University of Manchester Manchester £21,805 pa

A 3.5-year funded PhD designing a Smart Network-on-Chip, an asynchronous communication fabric with intelligence built into its microarchitecture, to manage congestion in 2.5D chiplet systems. The work replaces static routing heuristics with data-driven, learning-based policies, building on an existing RTL-verified asynchronous NoC IP, with possible directions in lightweight inference engines and distributed adaptive traffic management.

Contract

Verification Team Lead | Cork | |

Last week

Reperio Human Capital Cork, Ireland £103,589 – £129,486 pa

Lead and grow a verification team while remaining hands-on with mixed-signal power ICs. You define verification strategy, methodology and sign-off criteria, architect UVM/SystemVerilog environments at block, subsystem and SoC level, and own verification plans, regressions and coverage closure. Works closely with design, firmware, applications and test teams, with three days a week on site in Cork.

Hybrid Permanent

PhD Studentship: High-Efficiency Power Electronics for AI Data Centres and Net-Zero Grids

Last week

University of Warwick Coventry £21,805 pa

Develops medium-voltage solid-state transformer cells for hyperscale AI data centres and net-zero grids, tackling high-frequency power conversion, compact magnetic links and electrical-thermal degradation under high-dv/dt stress. Combines multi-physics finite-element modelling in ANSYS/COMSOL with experimental validation in a high-voltage power electronics lab, culminating in a scaled hardware prototype.

On-site Contract

Senior FPGA Engineer

3 weeks ago

MASS Lincoln £52,000 – £62,000 pa

As a Senior FPGA Engineer, you will design and implement real-time signal processing systems for mission-critical applications in the electromagnetic warfare domain. You will work closely with system engineers, software teams, and domain specialists to develop FPGA-based solutions using platforms like AMD/Xilinx RFSoC and Intel FPGA. The role involves a strong on-site presence in Lincoln, with opportunities for international collaboration and direct impact on operational outcomes.

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