Semiconductor Jobs

125 jobs for “Semiconductor Design Engineer”

Results

Semtech

Manager - Analog IC Design

  • Bristol
  • Hybrid · 4 days in office
  • Lead · manages people

Lead a Bristol team of analog IC design engineers, spanning associate to senior level, with direct oversight of performance, development and recruitment. The role is hands-on, guiding complex design work while managing project schedules, budgets and cross-functional priorities for optical communications ICs such as laser drivers, TIAs and transceivers.

SiGe BiCMOS · CMOS · GaAs +2

Last month

Semtech

Analog IC Design Manager

  • Sevenoaks
  • Hybrid · 4 days in office
  • Lead · manages people

Leads a multidisciplinary team of analog circuit and layout engineers across multiple high-speed IC product lines, owning the full NPI lifecycle from product definition to volume production. Drives tape-out, qualification, post-silicon bring-up and performance optimisation for TIAs and laser driver ICs up to 200G, working with teams in Stansted and Ottawa.

SAP

5 months ago

Renesas Electronics

Principal EDA Engineer

  • Edinburgh
  • Hybrid
  • Lead
  • Permanent

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Perforce Helix · Methodics IPLM · Cadence Virtuoso +4

3 weeks ago

Renesas Electronics

Principal EDA Engineer

  • Swindon
  • Hybrid
  • Lead
  • Permanent

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with Perforce Helix and IPLM-based data management. You will develop Linux-based engineering environments, Python and shell automation, project/workspace methodologies, and migration paths from legacy platforms, while supporting EDA tool integration and training engineering teams.

Perforce Helix · Methodics IPLM · Cadence Virtuoso +3

3 weeks ago

Redline Group

Senior IC Design Engineer

  • Whiteley
  • £50,000 – £80,000 pa
  • Senior

Design and optimise capacitive sensing architectures, develop and verify RTL in Verilog/SystemVerilog, and write embedded C/C++ software for sensing and signal processing. Lead silicon bring-up, debugging and validation across analogue, digital and firmware domains, collaborating with global teams on HMI solutions.

Verilog · SystemVerilog · C/C++ +7

Last week

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Analog Devices

Analog Design Engineering Intern

  • Edinburgh
  • On-site
  • Entry level
  • Internship

Work alongside experienced engineers on the design, simulation, and characterization of high-performance analog and mixed-signal ICs, including amplifiers, filters, data converters, and clocking solutions. Gain hands-on experience with Cadence and SPICE across circuit design, layout, silicon validation, and laboratory testing throughout the full IC development lifecycle.

Cadence · SPICE · Oscilloscopes +3

Clearance required 3 weeks ago

Analog Devices

Analog Design Engineering Intern (Audio)

  • Edinburgh
  • Entry level
  • Internship

Join a Consumer Audio design team in Edinburgh to work on real mixed-signal IC development, from circuit architecture research and feasibility studies to transistor-level design, simulation and verification of analog blocks. You will build testbenches, analyse trade-offs around noise, distortion and power, and collaborate with layout engineers through physical implementation and design reviews.

Cadence Virtuoso · Spectre · MATLAB +3

Clearance required 3 weeks ago

Bluegate Consulting

Device Design Engineer

  • Oldham

Design, simulate and optimise advanced Bipolar devices or MOSFETs using TCAD tools, working closely with process integration and characterisation teams to turn simulation insights into manufacturable, high-performance devices. The role spans process flow definition, electrical and physical data analysis to improve yield, and support from concept through qualification and production, with documentation of design and simulation results.

TCAD

Visa sponsorship 2 weeks ago

Graphcore

Silicon Logical Design Engineer - Multiple Levels

  • Bristol

Integrate IP and subsystems into top-level SoC designs, maintaining build and configuration environments while running synthesis, linting, CDC/RDC and timing checks. Work closely with verification and physical design teams on clean interface hand-offs, debug integration issues across hierarchies, and improve automation flows using Python, Tcl, SystemVerilog or VHDL.

SystemVerilog · VHDL · Python +1

2 weeks ago

Graphcore

Silicon Physical Design Engineer — Multiple Levels

  • Bristol
  • On-site
  • Mid-level
  • Permanent

Contribute technically to next-generation AI superchips, delivering sign-off-quality layouts in leading-edge process technologies. Work spans floorplanning, synthesis, place and route, CTS, timing analysis, physical verification and flow/tool development in Tcl and Python, collaborating closely with RTL, verification, DFT, architecture and packaging teams. Engineers are trusted to own their designs and improve flows, methodologies and infrastructure.

Tcl · Python · GDSII +7

2 weeks ago
Cambridge GaN Devices logo

Cambridge GaN Devices · 11–50 people · Series B

Senior Analog IC Design Engineer

  • Cambridge
  • On-site
  • Senior
  • Permanent

Design and layout of GaN power ICs using EDA tools, covering schematic capture, analog simulation, chip layout review, PEX and PLS. The role also involves wafer-level and packaged device testing, SPICE model development, and supporting patent and IP management within a growing R&D engineering team.

EDA Tools · SPICE · GaN

2 weeks ago

Pragmatic Semiconductor

IC Verification Engineer

  • Cambridge
  • Mid-level

Executes verification strategies for mixed-signal IP and FlexICs to ensure right-first-time tapeouts, working closely with digital and analog designers. Builds test bench environments, debugs failures, and produces verification reports and coverage statistics across the design flow. Requires strong SystemVerilog and verification methodology knowledge, with UVM highly desirable.

SystemVerilog · UVM · Verilog-AMS +1

3 weeks ago
Cambridge GaN Devices logo

Cambridge GaN Devices · 11–50 people · Series B

Senior Mixed Signal IC Design Enigneer

  • Cambridge
  • On-site
  • Senior
  • Permanent

Design GaN power ICs and Si gate drivers using EDA tools, covering schematic capture, RTL, analog/digital and mixed-signal simulation, synthesis, STA, PNR and AMS verification. Also develops test solutions, analyses wafer-level and packaged device data, documents designs, debugs ICs and generates IP for patent applications within a growing R&D engineering team.

EDA Tools · GaN · Si Gate Drivers

Last month

Bluegate Consulting

Reliability Engineer

  • Oldham
  • £40,000 – £45,000 pa

Owns reliability testing, failure analysis and lifetime modelling for semiconductor devices, developing and executing test plans and driving root-cause solutions for failure mechanisms. Works across design, test and manufacturing teams to improve product robustness, with programming used to write reliability test programs and handle customer returns.

Last week

Wolviston Management Services

Device Modelling & PDK Engineer

  • Darlington

Characterise and model compound semiconductor devices, developing compact models for GaN and GaAs technologies and running DC, pulsed I-V, noise and small/large-signal RF testing. You will build and validate MMIC Process Design Kits, support customer design queries and work with design engineers on new process development. Requires UK nationality and security clearance.

IC-CAP · ADS · Microwave Office +2

Clearance required Last month

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