This role involves designing and integrating analog/mixed-signal circuits for advanced semiconductor packaging and heterogeneous integration. Responsibilities include PHY-level interfaces, custom pad circuits, and working with industry partners to develop and commercialize innovative solutions.
This role involves leading a team of analog IC design engineers, managing project execution, and collaborating with cross-functional teams to develop high-volume products for optical communications. The position requires deep technical expertise in analog IC design and strong leadership skills to mentor and develop a high-performing team.
The Analog IC Design Manager leads a multidisciplinary team of analog circuit designers and layout engineers, driving the full NPI lifecycle for high-speed ICs. Responsibilities include technical execution, team management, and collaboration with various departments to ensure product success.
This role involves providing technical leadership for Renesas' global engineering compute and design-data-management environment. Responsibilities include managing compute infrastructure, Perforce/IPLM-based design data management, project and workspace methodologies, automation, and supporting engineering teams. The role requires significant experience in EDA/CAD engineering, strong Linux/Unix knowledge, and expertise in Perforce Helix and semiconductor EDA workflows.
This role involves providing technical leadership for Renesas’ global engineering compute and design-data-management environment. Responsibilities include managing compute infrastructure, Perforce/IPLM-based design data management, project/workspace methodologies, automation, and supporting globally distributed engineering teams.
As an Analog Design Engineer Intern, you will work on the design, simulation, and characterization of high-performance analog and mixed-signal ICs. You will use industry-standard tools like Cadence and SPICE, collaborate with senior engineers, and gain hands-on experience in the full IC development lifecycle, including circuit design, layout, and laboratory testing.
This internship involves hands-on work with a team of experienced engineers, focusing on the design, simulation, and verification of high-performance mixed-signal audio ICs. The role offers practical experience in transistor-level design, circuit architecture research, and collaboration on real silicon projects.
Responsible for the electrical design and testing of new X-ray and bond testing products, including panel and industrial system design with circuit breakers and contactors, plus wiring looms. Works within a Research and Development team serving major semiconductor and electronics manufacturers, using CAD tools such as AutoCAD or Inventor and applying electrical safety standards like IEC61010 and NPA79.
This role involves designing, simulating, and optimising advanced Bipolar devices or MOSFETs. You will collaborate with process engineers to translate simulation insights into manufacturable devices, analyse data to refine models, and support technology development from concept to production.
Electronics Design Engineer – Analogue/Mixed Signal/RFLocation: Central London – HybridSalary: Competitive, dependent on experienceIndustry: Quantum Computing / Photonics / Advanced TechnologyAn exciting opportunity for an experienced Electronics Design Engineer to work on cutting-edge technology at the forefront of quantum computing,...
The role involves improving the reliability, safety, and long-term performance of existing semiconductor manufacturing equipment. Responsibilities include design upgrades, resolving technical issues, managing obsolete components, and enhancing product maintainability. You will work closely with engineering, manufacturing, service, and supplier teams to develop practical solutions.
Design and layout of GaN power ICs using EDA tools, covering schematic capture, analog simulation, chip layout, DRC, LVS, PEX and PLS. Also involves wafer-level and packaged device testing, SPICE model development, chip evaluation and debugging, plus generating IP and supporting patent applications. Based in the Cambridge office and lab with occasional travel.
End-to-end physical implementation of complex ASIC/SoC designs, covering floorplanning, placement, CTS, routing and sign-off, plus synthesis, STA and PPA optimisation. The role also involves power planning, IR drop and electromigration analysis, DRC/LVS verification, DFT integration and developing flows in Cadence Innovus, Synopsys ICC2 and Calibre, working with foundries and RTL/architecture teams on advanced nodes.
Owns end-to-end physical implementation of complex ASIC/SoC designs, covering floorplanning, placement, CTS, routing, STA, power planning and sign-off. Works with RTL, DFT, verification and foundry teams on PPA, low-power and manufacturability, using Cadence Innovus, Synopsys ICC2 and Calibre flows for advanced nodes.
The IC Verification Engineer will develop and execute verification strategies for mixed-signal IP and FlexICs, working closely with digital and analog designers to ensure right-first-time tapeouts. Responsibilities include creating test bench environments, debugging failures, and reporting verification results.
