Semiconductor Jobs

• Fareham
• £55,000 – £65,000 pa
• Senior

Lead algorithm development for RISC-V-based capacitive touch controllers, owning projects from problem definition and modelling through experimentation, optimisation and validation on real hardware. Work spans sensor physics, mixed-signal electronics and DSP, designing filtering, calibration and noise-rejection algorithms while mentoring junior colleagues.

MATLAB · Python · RISC-V +5

• Cambridge
• On-site
• Mid-level
• Permanent

Designs and develops RF front-end circuits and functional blocks, integrating them into low-loss, high-performance multi-chip modules. Works closely with IC designers, systems, algorithm and software teams to optimise module performance and define test plans in a fast-moving fabless semiconductor start-up.

• Fareham
• £33,000 – £38,000 pa
• Junior

Develop and debug embedded C firmware for microcontrollers, support capacitive sensing algorithm development, and use Python for modelling, simulation and data analysis. Work alongside software, hardware and applications engineering teams on new features, investigating performance issues across software and hardware.

Git · SVN · MATLAB +1

• Oxford
• Hybrid
• £60,000 – £80,000 pa
• Senior

Design, simulate and implement DSP algorithms for telecommunications and sensing, then turn them into FPGA firmware in VHDL and/or Verilog. You'll own simulations, testbenches and verification plans, support hardware integration and space-system qualification, and maintain existing firmware while contributing technical leadership across complex programmes.

Xilinx Versal AI Engines · SoC · Vector Processors

• Lincoln
• Hybrid
• £60,000 – £70,000 pa
• Lead
• Permanent

Lead the design and delivery of advanced FPGA architectures for RF signal processing, high-speed data handling and real-time DSP on a large System-of-Systems programme. Work hands-on with AMD/Xilinx RFSoCs and Intel FPGAs, VHDL/SystemVerilog, embedded C and Vivado/Quartus, acting as technical expert across cross-functional teams.

AMD · Xilinx RFSoC · Zynq UltraScale+ +7

• Newcastle upon Tyne
• Lead

Develops and maintains a C++ codebase for next-generation EDA tools, focusing on computational geometry, geometry manipulation and algorithmic complexity for sub-20nm IC design. Involves writing design, function and test specifications, interfacing with build and regression systems, and collaborating with a global cross-functional team.

Qt · Linux · Unix

• Guildford
• On-site
• £40,000 – £46,000 pa
• Entry level

Join a multidisciplinary team building integrated software-hardware systems for defence and security, spanning low-power embedded devices to high-throughput server applications. You'll apply C/C++, FPGA, and electronics skills to complex projects combining custom hardware with innovative software, with labs and prototyping facilities on site.

FPGA · VHDL · PCB

• United Kingdom
• £50,000 – £70,000 pa
• Senior

Join a Surrey technical consultancy building custom hardware and software solutions for UK government clients, spanning embedded C/C++, FPGAs, PCB design and signal processing. You will mentor junior engineers, drive new project direction and manage client relationships through reports and presentations. Requires UK nationality due to project sensitivity.

FPGA · VHDL · PCB

• Bristol
• Hybrid
• Mid-level
• Permanent

Contribute to fundamental and applied AI research, generating ideas, designing experiments and translating them into scalable implementations using PyTorch or JAX. The role emphasises lower-level programming (C++/CUDA/Triton) and hardware-aware optimisation, with work spanning efficient training and inference, world models, reinforcement learning and life sciences, and results published at NeurIPS, ICML and ICLR.

PyTorch · JAX · XLA +1

• London
• Hybrid
• Mid-level
• Permanent

Contribute to fundamental and applied AI research, generating ideas, designing experiments and translating them into scalable implementations. Work spans efficient training and inference, world models, reinforcement learning and life sciences, with a focus on hardware-aware algorithms and low-level performance optimisation in C++/CUDA/Triton. Collaborate with silicon and software engineers and publish at NeurIPS, ICML and ICLR.

PyTorch · JAX · CUDA +3

• Didcot
• Hybrid · 4 days in office
• £41,414 – £67,481 pa
• Senior
• Contract

Develop and debug HDL firmware for Xilinx FPGAs in Vivado, implementing full-cycle designs for magnet power supplies on the Diamond-II upgrade, including feedback control, filtering and interlock state machines. Work with ADCs, DACs, memory and microcontrollers, verifying designs via simulation and on-hardware testing, and collaborate with hardware and control engineers on Ethernet-based interfaces.

Xilinx · Vivado · MATLAB +7

• Guildford
• £44,000 – £47,000 pa
• Entry level

Graduates simulate and implement signal, image or data processing algorithms in VHDL for FPGAs, design PCBs with SoCs, high-speed network interfaces and analogue/RF filtering, and perform schematic capture in OrCAD. The role also covers managing PCB fabrication and assembly subcontractors, writing test firmware and developing Linux device drivers, within a consultancy serving government and technology clients.

FPGA · VHDL · OrCAD +3

• Cheltenham
• £45,000 – £55,000 pa
• Entry level

Contribute to advanced electronic systems by implementing signal, image and data-processing algorithms in VHDL, designing PCBs with FPGAs, SoCs and high-speed interfaces, and completing schematic capture in OrCAD. The role also covers test firmware, embedded software, Linux device drivers and bringing up newly designed boards within a multidisciplinary engineering team.

FPGA · VHDL · OrCAD +4

• Farnborough
• On-site
• £80,000 – £90,000 pa
• Mid-level
• Permanent

Owns FPGA solutions end to end, from requirements capture and architecture through VHDL implementation, verification, hardware integration and production. Works in a multidisciplinary team on secure digital design for cyber and information-assurance applications, coordinating other engineers and external suppliers, with four days a week onsite in Farnborough.

Microchip · Libero · ModelSim +7

• Darlington
• Mid-level

Responsible for managing and improving RF and DC wafer-level semiconductor test systems, developing test methodologies such as S-Parameters, Noise Figure and Gauge R&R, and optimising LabVIEW-based automated test applications. Works with Product Engineering and Production on NPI, probe card commissioning, SPC data analysis and fault-finding, while mentoring technicians and operators.

LabVIEW · C++ · C# +7