Semiconductor Jobs

• Bristol
• Senior

Translate product requirements into specifications for complex, highly integrated silicon devices, owning sub-system architecture, modelling, validation and evaluation. Assess third-party hard and soft IP, specify integration across the platform, and contribute to silicon bring-up and characterisation. Works with processor, SoC and system architects, reporting to the Director of Silicon Architecture.

• Bristol

Owns verification of complex AI compute silicon, ensuring RTL matches architecture specifications. Plans verification, defines coverage, generates tests, diagnoses failures and improves shared infrastructure, working closely with Architecture, Logical Design and Physical Design teams across multiple UK sites.

UVM · SVA · Git +2

• Bristol
• Senior

Leading role supporting NPI development and volume production of complex AI hardware, providing DfM feedback on PCB and system design and working closely with contract manufacturers. Drives yield improvement, analyses production data and resolves L6 manufacturing issues, with travel to Taiwan to work alongside suppliers.

JMP · SQL · Python +2

• Bristol
• Senior

Develop manufacturing tests for advanced PCB assemblies, analysing designs for testability and manufacturing risks. Build boundary scan and embedded functional tests, diagnose faults to component level, and deploy and support solutions in factory and field environments alongside design and manufacturing teams.

JTAG · Boundary Scan · ICT +5

• Bristol

Develop and deploy board and PCBA hardware tests to expose manufacturing defects in advanced circuit boards, taking tests from design analysis through to factory and field support. Build boundary scan and embedded functional tests, assess PCB testability and failure mechanisms, and work with Hardware Design and contract manufacturers to resolve hardware problems.

Boundary Scan · Automated Optical Inspection · Automated X-ray Inspection

• Bristol
• Hybrid
• Mid-level
• Permanent

Contribute to fundamental and applied AI research, generating ideas, designing experiments and translating them into scalable implementations using PyTorch or JAX. The role emphasises lower-level programming (C++/CUDA/Triton) and hardware-aware optimisation, with work spanning efficient training and inference, world models, reinforcement learning and life sciences, and results published at NeurIPS, ICML and ICLR.

PyTorch · JAX · XLA +1

• London
• Hybrid
• Mid-level
• Permanent

Contribute to fundamental and applied AI research, generating ideas, designing experiments and translating them into scalable implementations. Work spans efficient training and inference, world models, reinforcement learning and life sciences, with a focus on hardware-aware algorithms and low-level performance optimisation in C++/CUDA/Triton. Collaborate with silicon and software engineers and publish at NeurIPS, ICML and ICLR.

PyTorch · JAX · CUDA +3

• Cambridge
• Hybrid
• Mid-level
• Permanent

Conducts AI/ML research at Graphcore, generating ideas, designing experiments and translating them into scalable implementations, with a focus on hardware-aware algorithms and performance optimisation. Works with researchers, silicon and software engineers, and publishes at conferences such as NeurIPS, ICML and ICLR. Requires strong Python/PyTorch or JAX skills plus lower-level C++/CUDA/Triton programming.

PyTorch · JAX · XLA +1

• Bristol
• £45,000 pa
• Entry level
• Permanent

Graduate role developing firmware for next-generation AI hardware, covering bootup, power control, telemetry and monitoring. You'll write and review code, work with continuous integration and build systems, and collaborate with silicon and hardware teams in Agile ceremonies. Part of a two-year graduate programme with hands-on embedded software development.

• Bristol
• £45,000 pa
• Entry level
• Permanent

Develop, test and refine C++ models and simulations of next-generation AI accelerators, predicting performance, power and scalability to guide hardware decisions. Work in a small Accelerator Modelling team alongside architects, hardware and ML researchers, scaling distributed modelling environments and integrating future hardware versions.

• Bristol
• £45,000 pa
• Entry level
• Permanent

Join the Silicon Architecture team to specify, model and evaluate complex SoC subsystems for next-generation AI hardware, with guidance from experienced architects. Work spans architectural modelling, IP assessment, design trade-offs and silicon bring-up, collaborating across design, verification, hardware and software teams. A two-year graduate programme with mentoring and growing ownership.

PCIe · Ethernet · DDR

• Bristol
• Lead

Owns yield, quality and cost outcomes for advanced semiconductor products from launch through high-volume manufacturing, spanning chip test, PCBA and rack-scale systems. Partners with OSATs and internal test, quality and data teams, using SPC, DOE and Python/SQL/JMP analysis to turn manufacturing data into action.

Python · SQL · JMP

• Bristol
• Senior

Provide technical leadership on complex power-delivery challenges across silicon, package, PCB and voltage regulation. Define modelling strategies, analyse PDN impedance, voltage droop and transient response, and drive power-integrity issues to resolution while mentoring engineers and aligning cross-disciplinary teams.

• Bristol

Define and implement DFT architecture and features for next-generation AI silicon aimed at data centre applications, developing DFT flows and methodologies and supporting their verification. Work spans structural test vectors, test coverage, scan-based testing and ATPG, alongside silicon bring-up and yield learning with design, verification, physical design and product engineering teams.

VCS · Verdi · Python +3

• Bristol
• Hybrid
• Lead · manages people
• Permanent

Lead the bring-up and characterisation of silicon devices and system platforms, building a new team that develops characterisation plans, automates testing and analyses results. Hands-on technical leadership role working with architecture, silicon, hardware, operations and product teams across Bristol, Cambridge and Taiwan.

PCIe · Ethernet · DDR +2