Semiconductor Jobs

• Bristol

Designs and validates high-speed signal paths for AI compute hardware, covering 112Gbps and 224Gbps SERDES, DDR and processor interfaces. Involves PCB structure extraction and simulation, defining launches, vias, transmission lines and stack-ups, plus lab validation with VNAs and oscilloscopes from concept through prototype bring-up and manufacture support.

ANSYS SIWave · HFSS · Mentor HyperLynx +3

• Bristol

Define and implement DFT architecture and features for next-generation AI silicon aimed at data centre applications, developing DFT flows and methodologies and supporting their verification. Work spans structural test vectors, test coverage, scan-based testing and ATPG, alongside silicon bring-up and yield learning with design, verification, physical design and product engineering teams.

VCS · Verdi · Python +3

• Edinburgh
• Senior

Contribute to pre-silicon verification of analog and mixed-signal products, covering top-level DMS SV/UVM, gate-level simulation, and metric-driven AMS simulations. Bridge verification and validation environments to support post-silicon validation while establishing and improving verification flows and models for a global multi-disciplinary team.

Cadence Xcelium · Cadence IMC · Cadence Virtuoso +7

• Newbury
• Senior

Designs multi-channel digital receivers and transmitters for phased-array, radar, electronic warfare and satellite communication markets, developing RF converter-centric hardware and software from concept to productization. Analyses signal chains using RF cascade concepts and guides customers through system integration, troubleshooting and testing.

MATLAB · Python · C/C++

• Bristol
• Mid-level

Drive hardware manufacturing projects from planning through production release, keeping engineering, operations and external manufacturing partners aligned. Manage priorities, track progress and remove delivery risks across hardware, software, systems and operations teams, working with colleagues in Bristol, Cambridge, India, Taiwan and the US.

Jira · Confluence · MS Project

• Bristol
• £45,000 pa
• Entry level
• Permanent

Two-year graduate programme supporting silicon packaging and PCB assembly production in Taiwan, analysing performance data and using test design to investigate hardware and software issues. You'll contribute to quality planning, audits, process control, component selection and bill of materials management, working with Product Test, Quality and Supply Chain teams across the UK, Taiwan and India.

• Bristol
• £2,500 pm
• Entry level
• Internship

A 12-week summer internship in the Manufacturing Operations team, supporting silicon packaging or PCB assembly production in Taiwan. Tasks may include analysing performance data, investigating hardware or software issues, and supporting quality planning, process checks and BOM reviews, working alongside Product Test, Quality and Supply Chain colleagues across the UK, Taiwan and India.

O'Reilly

• Bristol
• £2,500 pm
• Entry level
• Internship

A 12-week summer internship contributing to firmware for next-generation AI hardware, from first boot to system monitoring. You'll write code, develop unit tests and debug behaviour on real hardware using logs, oscilloscopes and logic analysers, working alongside silicon and hardware teams within System Software.

O'Reilly

• Bristol
• Senior · manages people

Lead a team of signal and power integrity specialists, shaping requirements, design margins and acceptance criteria across silicon, package, PCB and system boundaries. Line-manage engineers, coordinate analysis and hardware correlation, and connect integrity work with design, firmware, test and manufacturing colleagues. Methods and knowledge built by the team are intended to outlast individual designs.

• Bristol
• Senior

Coordinates manufacturing test delivery for New Product Introductions, connecting chip, board and system test, lab operations and silicon characterisation into one programme. Supports DfX reviews, manages cross-functional plans and improves NPI/NPD processes across globally distributed teams in Product Test and Diagnosis.

• Bristol
• On-site
• Mid-level · manages people

Owns the safe, reliable operation of Graphcore's Bristol electronics labs, managing test equipment, lab infrastructure, ESD controls, goods in/out, maintenance planning and technical readiness. Builds and mentors a technician team supporting hardware bring-up, validation, characterisation and product test, working closely with Facilities, Supply Chain, Quality and Hardware Engineering.

• Bristol
• Director · manages people

Lead a newly formed characterisation team within Manufacturing Operations, defining bring-up and characterisation strategies for next-generation AI silicon and system platforms. The role is hands-on, shaping lab infrastructure and working across silicon, hardware, manufacturing, architecture and product teams to validate performance under real-world conditions.

ATE

• Bristol
• £2,500 pm
• Entry level
• Internship

A 12-week summer internship in the Product Test and Diagnosis team within Manufacturing Operations, working hands-on with advanced AI hardware across silicon, boards, server blades or rack-scale systems. You'll develop automated test solutions, run system-level tests and analyse results, connecting manufacturing test to design, validation and performance.

Python · Linux · Bash +2

• Bristol
• Senior

Owns sub-system architecture for highly integrated AI silicon, translating product requirements into specifications, models and validation plans. Assesses third-party hard and soft IP, works with vendors on integration, and supports silicon bring-up and characterisation. Sits within a silicon architecture team reporting to the Director of Silicon Architecture, mentoring engineers and representing the team in cross-functional groups.

• Bristol
• Senior

Translate product requirements into specifications for complex, highly integrated silicon devices, owning sub-system architecture, modelling, validation and evaluation. Assess third-party hard and soft IP, specify integration across the platform, and contribute to silicon bring-up and characterisation. Works with processor, SoC and system architects, reporting to the Director of Silicon Architecture.