Semiconductor Jobs

• Cambridge
• Hybrid
• Mid-level
• Permanent

Conducts AI/ML research at Graphcore, generating ideas, designing experiments and translating them into scalable implementations, with a focus on hardware-aware algorithms and performance optimisation. Works with researchers, silicon and software engineers, and publishes at conferences such as NeurIPS, ICML and ICLR. Requires strong Python/PyTorch or JAX skills plus lower-level C++/CUDA/Triton programming.

PyTorch · JAX · XLA +1

• Cambridge

Builds and maintains the tooling and platforms that support AI research and engineering teams, covering CI/CD, build engineering, packaging and release systems. Day to day involves deploying services with Kubernetes and Docker and managing cloud infrastructure with Terraform, working in squads with a strong service-ownership culture.

AWS · Docker · Kubernetes +7

• Edinburgh
• Entry level
• Internship

Hands-on internship in a design verification team, validating IP and subsystem-level designs for high-performance semiconductor products. You will develop System Verilog/UVM testbenches, run simulations, debug failures, create directed and constrained-random tests, and track functional, code and assertion coverage while supporting regression automation with scripting.

SystemVerilog · Verilog · UVM +7

• Edinburgh
• Senior

Implements and verifies digital logic for mixed-signal SoCs used in high-performance power systems, covering RTL development, synthesis, static timing analysis and DFT insertion. Works with analog, firmware and validation teams on integration, silicon bring-up and lab debug, with scope to improve methodology and automation.

Genus · Innovus · Tempus +4

• Edinburgh
• Hybrid
• Lead
• Permanent

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Perforce Helix · Methodics IPLM · Cadence Virtuoso +4

• Swindon
• Hybrid
• Lead
• Permanent

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with Perforce Helix and IPLM-based data management. You will develop Linux-based engineering environments, Python and shell automation, project/workspace methodologies, and migration paths from legacy platforms, while supporting EDA tool integration and training engineering teams.

Perforce Helix · Methodics IPLM · Cadence Virtuoso +3

• Bristol
• Hybrid · 4 days in office
• Senior

Drive validation strategy for next-generation high-speed semiconductor devices, architecting end-to-end test solutions spanning software, hardware and documentation. Build Python or LabVIEW automation, take precision lab measurements at 10Gbit/s and above, and apply signal integrity expertise to schematic entry and PCB layout in Altium. Lead validation reviews and mentor engineers within a Bristol R&D team.

Python · LabVIEW · Altium

• Sevenoaks
• Hybrid · 4 days in office
• Entry level

Designs analogue and mixed-signal subsystems for high-speed TIA and laser driver ICs supporting data rates up to 200G, taking ownership of blocks from concept through validation and volume production. Works with layout, verification and product teams on performance, power and area targets, using Cadence tools within a Stansted and Ottawa design centre.

Cadence · Verilog-AMS · SystemVerilog

• Manchester
• £21,805 pa
• Entry level
• Contract

A 3.5-year funded PhD designing a Smart Network-on-Chip, an asynchronous communication fabric with intelligence built into its microarchitecture, to manage congestion in 2.5D chiplet systems. The work replaces static routing heuristics with data-driven, learning-based policies, building on an existing RTL-verified asynchronous NoC IP, with possible directions in lightweight inference engines and distributed adaptive traffic management.

CPUs · GPUs · AI Accelerators +5

• Southampton
• Hybrid · 3 days in office
• £70,000 – £80,000 pa
• Senior

Works across the full FPGA development lifecycle, from architecture and VHDL/Verilog design through simulation, verification, timing closure and lab-based hardware testing. Involves high-speed digital interfaces, DSP and SoC platforms such as Xilinx Zynq, within a multidisciplinary engineering team. Open to mid and senior level engineers.

MATLAB · Simulink · Xilinx Zynq +7

• Coventry
• On-site
• £21,805 pa
• Entry level
• Contract

Develops medium-voltage solid-state transformer cells for hyperscale AI data centres and net-zero grids, tackling high-frequency power conversion, compact magnetic links and electrical-thermal degradation under high-dv/dt stress. Combines multi-physics finite-element modelling in ANSYS/COMSOL with experimental validation in a high-voltage power electronics lab, culminating in a scaled hardware prototype.

ANSYS · COMSOL · FPGA +1

• Didcot
• On-site
• £45,000 – £65,000 pa
• Mid-level

Source, evaluate and procure electronic components such as PCBs, semiconductors, connectors and sensors, interpreting technical drawings, BOMs and specifications. Work alongside engineering, projects and quality teams to identify and qualify new suppliers, within a growing procurement function supporting advanced space communications technology.

MRP · ERP · Infor +7

• Glenrothes
• On-site
• £35,000 – £40,000 pa
• Permanent

Workshop-based maintenance role covering pneumatic, hydraulic and electrical systems, including fault-finding, planned preventative maintenance and reactive breakdowns as part of a team. Includes a structured two-year training programme with progression in a long-established semiconductor manufacturing business.

• Lincoln
• £52,000 – £62,000 pa
• Senior

As a Senior FPGA Engineer, you will design and implement real-time signal processing systems for mission-critical applications in the electromagnetic warfare domain. You will work closely with system engineers, software teams, and domain specialists to develop FPGA-based solutions using platforms like AMD/Xilinx RFSoC and Intel FPGA. The role involves a strong on-site presence in Lincoln, with opportunities for international collaboration and direct impact on operational outcomes.

• Pilning
• On-site
• £32,000 – £36,000 pa
• Permanent

Assemble and wire high-tech semiconductor production systems, including soldering, crimping and looming, while reading electrical drawings and fault-finding to implement corrective action. Joins a production team building complex system configurations for micro and nanostructure tooling. Requires a time-served electrical apprenticeship or Level 3 qualification.