Semiconductor Jobs

• Bristol
• On-site
• Mid-level · manages people

Owns the safe, reliable operation of Graphcore's Bristol electronics labs, managing test equipment, lab infrastructure, ESD controls, goods in/out, maintenance planning and technical readiness. Builds and mentors a technician team supporting hardware bring-up, validation, characterisation and product test, working closely with Facilities, Supply Chain, Quality and Hardware Engineering.

• Bristol
• Lead

Lead advanced manufacturing test strategy for complex circuit board assemblies, defining methods and evaluation criteria across optical and X-ray inspection, in-circuit test, boundary scan and functional test. Set direction, mentor engineers and work closely with design, manufacturing, silicon and CEM partners to improve defect coverage and diagnostic resolution.

JTAG 1149.x · iJTAG · MDA +1

• Cambridge
• £100,000 – £180,000 pa
• Senior

Owns all aspects of FPGA system design, architecting and implementing RTL on high-end Xilinx/Intel devices for ultra-low-latency infrastructure. Leads micro-architecture definition, verification environments and timing closure while mentoring the FPGA team and collaborating with firmware, software and infrastructure engineers on full-stack optimisation.

Xilinx · Intel · Vivado +2

• Cheltenham
• £45,000 – £55,000 pa
• Entry level

Contribute to advanced electronic systems by implementing signal, image and data-processing algorithms in VHDL, designing PCBs with FPGAs, SoCs and high-speed interfaces, and completing schematic capture in OrCAD. The role also covers test firmware, embedded software, Linux device drivers and bringing up newly designed boards within a multidisciplinary engineering team.

FPGA · VHDL · OrCAD +4

• Bristol
• Hybrid · 4 days in office
• Senior

Lead bench PVT characterization for high-speed optical and electrical signal integrity products, developing automated test environments and analyzing complex datasets. Work with an international team across the UK, Canada, US and Mexico, using Python automation and mentoring junior engineers in a lab-based NPI role.

Python

• Bristol
• Hybrid · 4 days in office
• Senior

Develop, deploy and optimise wafer and package-level test solutions on the Advantest V93000 platform, covering test development, characterisation, qualification support and production ramp-up. Work closely with design, product engineering and offshore OSAT partners across the full product lifecycle, with a focus on high-speed mixed-signal ICs, DFT and yield/test-time improvement.

Advantest V93000

• Edinburgh
• Entry level
• Internship

Placement students work alongside engineering teams on real, challenging assignments, contributing to product development across electronics, software and computer science. Interns are paired with experienced mentors and treated as extended interview candidates for future full-time roles, with work spanning IoT, automotive radar, healthcare and 5G systems.

5G · IoT

• Oxford
• Hybrid
• Senior

Lead validation and characterisation of analogue and mixed-signal ASICs for trapped-ion quantum processors, from test planning and platform development through first-silicon bring-up, debug and system integration. The role spans room-temperature and cryogenic (around 4 K) measurements on packaged parts, chip-on-board assemblies and bare die, with heavy Python automation and test PCB work.

Python · Git · SPI +7

• Oxford
• Hybrid · 3 days in office
• Senior

Integrate all features needed to operate quantum computers into complex multi-layer chips, guiding designs from requirements through layout and tape-out. Work with scientists and fabrication engineers on ion trapping chips, handling metal-track routing and photonics/CMOS interfaces. Hybrid role, three days per week in the Oxford office.

GDSFactory · Cadence

• Cambridge
• Lead · manages people

Technical leadership role owning product-level characterisation strategy, translating requirements and risks into proportionate test coverage, analysis and reporting. Leads a small team developing automated volume test solutions while hands-on with wafer-level ATE characterisation, RF/analogue test design and large-dataset analysis, presenting findings to stakeholders from project inception through production transfer.

Python · LabVIEW · C# +2

• Newbury
• Senior

Designs multi-channel digital receivers and transmitters for phased-array, radar, electronic warfare and satellite communication markets, developing RF converter-centric hardware and software from concept to productization. Analyses signal chains using RF cascade concepts and guides customers through system integration, troubleshooting and testing.

MATLAB · Python · C/C++

• Edinburgh
• On-site
• Entry level
• Permanent

Support the design and verification of analog integrated circuit blocks, from transistor-level schematic capture and simulation through layout review and debug. Work alongside experienced engineers on real silicon projects, documenting and presenting findings to the team.

• Edinburgh
• Mid-level
• Permanent

Hands-on lab role supporting hardware development and evaluation, building, modifying and repairing electronic hardware. You will assemble and rework PCBs, commission evaluation boards, manage component and equipment inventory, coordinate with suppliers, and train engineers on soldering and lab best practices.

Microsoft Word · Microsoft Excel

• Southampton
• £37,369 – £39,560 pa
• Entry level
• Contract

Investigates 2D semiconductors and ferroelectric materials to build non-volatile memory that co-locates storage and processing for low-power AI hardware. Combines materials characterisation, interface engineering and device fabrication at the Southampton Nanofabrication Centre, with short research visits to Cambridge and NPL. Based in the 2D-MINDs team and the ECS Centre for Neuromorphic Technologies.

Raman Spectroscopy · Photoluminescence · AFM +2

• Coventry
• On-site
• £21,805 pa
• Entry level
• Contract

Develops medium-voltage solid-state transformer cells for hyperscale AI data centres and net-zero grids, tackling high-frequency power conversion, compact magnetic links and electrical-thermal degradation under high-dv/dt stress. Combines multi-physics finite-element modelling in ANSYS/COMSOL with experimental validation in a high-voltage power electronics lab, culminating in a scaled hardware prototype.

ANSYS · COMSOL · FPGA +1