Semiconductor Jobs

• Edinburgh
• Hybrid
• Lead · manages people
• Permanent

Lead verification of complex mixed-signal ICs across the full development cycle, from concept and verification planning through implementation, execution and release. Develop UVM and formal testbench architectures, define coverage and closure metrics, debug gate-level simulations, and mentor junior engineers while leading IP or SoC verification efforts.

UVM · SystemVerilog · Makefile +7

• Hayes
• Senior

Field Application Engineer supporting regional accounts across the UK, working with Account Managers and Business Unit specialists to solve complex application-level problems and drive design wins. Involves building customer relationships, identifying new business opportunities, training customers and presenting at seminars, with around 10% travel.

• Bristol
• Senior

Translate product requirements into specifications for complex, highly integrated silicon devices, owning sub-system architecture, modelling, validation and evaluation. Assess third-party hard and soft IP, specify integration across the platform, and contribute to silicon bring-up and characterisation. Works with processor, SoC and system architects, reporting to the Director of Silicon Architecture.

• Bristol
• Senior

Coordinates manufacturing test delivery for New Product Introductions, connecting chip, board and system test, lab operations and silicon characterisation into one programme. Supports DfX reviews, manages cross-functional plans and improves NPI/NPD processes across globally distributed teams in Product Test and Diagnosis.

• Coventry
• On-site
• £21,805 pa
• Entry level
• Contract

Develops medium-voltage solid-state transformer cells for hyperscale AI data centres and net-zero grids, tackling high-frequency power conversion, compact magnetic links and electrical-thermal degradation under high-dv/dt stress. Combines multi-physics finite-element modelling in ANSYS/COMSOL with experimental validation in a high-voltage power electronics lab, culminating in a scaled hardware prototype.

ANSYS · COMSOL · FPGA +1

• Didcot
• Hybrid · 4 days in office
• £41,414 – £58,679 pa
• Senior
• Contract

Develop and maintain HDL firmware for Xilinx FPGAs in Vivado, implementing feedback control, filtering and interlock handling with state machines for magnet power supply controllers. The role covers simulation, verification and on-hardware validation using logic analysers, plus Ethernet-based control interfaces, within a not-for-profit scientific organisation on a major facility upgrade.

Xilinx · Vivado · ADC +7

• Southampton
• On-site
• £30,000 – £36,000 pa

Joining the Device Processing Team, you will work in the cleanroom and production site fabricating devices for customers using metal sputtering, furnace processing, photolithography, acid etch, wafer dicing, polishing and poling, plus inspection and characterisation. You will work to production schedules meeting customer timescales and quality standards, with some general administration.

SEM · Profilometers

• Southampton
• £37,369 – £39,560 pa
• Entry level
• Contract

Investigates 2D semiconductors and ferroelectric materials to build non-volatile memory that co-locates storage and processing for low-power AI hardware. Combines materials characterisation, interface engineering and device fabrication at the Southampton Nanofabrication Centre, with short research visits to Cambridge and NPL. Based in the 2D-MINDs team and the ECS Centre for Neuromorphic Technologies.

Raman Spectroscopy · Photoluminescence · AFM +2

• Southampton
• On-site
• £30,000 – £35,000 pa
• Mid-level
• Permanent · Flexible

Manufacture specialist optical devices across a production facility and university cleanroom, running wafer and chip-level processes such as photolithography, sputtering, furnace processing, dicing, polishing and inspection. Maintain production logs, quality documentation and cleanroom standards while reporting process issues and supporting continuous improvement in an advanced photonics and quantum technology setting.

• Darlington
• Mid-level

Responsible for managing and improving RF and DC wafer-level semiconductor test systems, developing test methodologies such as S-Parameters, Noise Figure and Gauge R&R, and optimising LabVIEW-based automated test applications. Works with Product Engineering and Production on NPI, probe card commissioning, SPC data analysis and fault-finding, while mentoring technicians and operators.

LabVIEW · C++ · C# +7

• Durham
• On-site
• Lead · manages people

Owns metal-oxide PVD process development, qualification and sustaining on 300mm production tools, defining process windows and driving SPC, Cpk and root-cause investigations for yield-limiting film issues. Combines deep technical leadership of reactive sputtering with line management of a small deposition team, partnering with equipment, integration and reliability engineers.

R · R-Markdown · JMP +1

• Newton Aycliffe
• Shift work

Hands-on technical support role across semiconductor fabrication and testing operations, troubleshooting process issues, investigating deviations and implementing yield and efficiency improvements. Works on a shift-based pattern, collaborating with Process, Production and Development Engineering teams and supporting new process introduction. Distinct for its focus on SPC, wafer testing and out-of-control event response in a high-volume fab.

Microsoft Office · GaAs · GaN +1

• Northampton
• On-site
• Mid-level
• Shift work

Provide first-line engineering support for wafer fabrication and epitaxy equipment, covering fault diagnosis, repair, preventative maintenance and optimisation of lithography, etch, PVD, PECVD and MOVPE reactor systems. The role works a continental 12-hour shift pattern in a cleanroom, handling hazardous process gases and chemicals and supporting gas delivery, exhaust and abatement systems.

Lithography · Etch · PVD +7

• Swansea
• On-site
• Mid-level
• Shift work

Provide first-line engineering support for wafer fabrication and epitaxy equipment, covering fault diagnosis, repair and preventative maintenance on lithography, etch, PVD, PECVD and MOVPE reactor systems. The role also involves managing chemical and specialist gas supply systems, spare parts inventory and continuous improvement work such as Kaizen, 6S and 8D. It is based in a cleanroom on a continental shift pattern, including SCBA use and emergency response duties.

Lithography · Etch · PVD +7

• Cambridge
• Mid-level

Designs and develops FPGA firmware for defence technologies spanning communications, sensors and detection systems, working within a small multidisciplinary engineering team. Uses VHDL or Verilog and collaborates with internal teams and external groups, with security clearance required and room to grow as the company expands.