Semiconductor Jobs

• Bristol

Designs and validates high-speed signal paths for AI compute hardware, covering 112Gbps and 224Gbps SERDES, DDR and processor interfaces. Involves PCB structure extraction and simulation, defining launches, vias, transmission lines and stack-ups, plus lab validation with VNAs and oscilloscopes from concept through prototype bring-up and manufacture support.

ANSYS SIWave · HFSS · Mentor HyperLynx +3

• Bristol
• £2,500 pm
• Entry level
• Internship

A 12-week summer internship working on the electronic hardware behind AI compute platforms, focusing on either Hardware Design (schematic and circuit design, PCB development, board bring-up, lab testing) or Signal Integrity (high-speed links like PCIe and Ethernet, DDR memory interfaces, simulation and measurement). Interns work on a scoped design, analysis, validation or debugging task with guidance from Staff Hardware Engineers and Team Leads, using tools such as Mentor Expedition, Ansys HFSS and Keysight ADS.

Mentor Expedition · Ansys HFSS · Keysight ADS +3

• Bristol
• Hybrid · 4 days in office
• Senior

Graduate role validating next-generation high-speed semiconductor devices, working hands-on in the lab from week one. You'll build test automation in Python or LabVIEW, take measurements on components running at 10Gbit/s and above, and learn high-speed signal integrity with Altium PCB tools. Based in Bristol, hybrid with four days in office.

Python · LabVIEW · Altium

• Durham
• On-site
• Lead · manages people

Owns metal-oxide PVD process development, qualification and sustaining on 300mm production tools, defining process windows and driving SPC, Cpk and root-cause investigations for yield-limiting film issues. Combines deep technical leadership of reactive sputtering with line management of a small deposition team, partnering with equipment, integration and reliability engineers.

R · R-Markdown · JMP +1

• Bristol
• Hybrid · 4 days in office
• Senior

Drive validation strategy for next-generation high-speed semiconductor devices, architecting end-to-end test solutions spanning software, hardware and documentation. Build Python or LabVIEW automation, take precision lab measurements at 10Gbit/s and above, and apply signal integrity expertise to schematic entry and PCB layout in Altium. Lead validation reviews and mentor engineers within a Bristol R&D team.

Python · LabVIEW · Altium

• Cambridge
• £60,000 – £90,000 pa
• Senior

Own the full product lifecycle for complex instruments used in defence and security, from concept through to prototype production. Day-to-day work centres on HDL design with VHDL or SystemVerilog, using toolchains such as Vivado or Quartus, running simulations and testbenches, and performing hardware-level debugging. Requires UK security clearance.

Vivado · Quartus

• Lincoln
• Hybrid
• £60,000 – £70,000 pa
• Lead
• Permanent

Lead the design and delivery of advanced FPGA architectures for RF signal processing, high-speed data handling and real-time DSP on a large System-of-Systems programme. Work hands-on with AMD/Xilinx RFSoCs and Intel FPGAs, VHDL/SystemVerilog, embedded C and Vivado/Quartus, acting as technical expert across cross-functional teams.

AMD · Xilinx RFSoC · Zynq UltraScale+ +7

• Cambridge
• Hybrid
• £100,000 – £160,000 pa
• Senior

Design and develop reusable FPGA modules in SystemVerilog for deployment across multiple next-generation products, with RTL verification and timing closure work. You'll write specifications, review code and documentation, and collaborate with hardware, software and mechanical engineers in a hybrid Cambridge team.

SystemVerilog · Python · Cocotb +4

• Coventry
• Hybrid
• £40,000 – £60,000 pa
• Mid-level
• Permanent

Work across the full FPGA design cycle, from requirements analysis and specification through RTL design, implementation and verification. Define module architectures, run synthesis and timing analysis, and integrate FPGAs into target hardware, using VHDL or Verilog and leading vendor tools alongside senior engineers and system architects.

• Whiteley
• Hybrid
• £75,000 pa
• Senior

Lead the integration and validation of advanced touch technologies into customer devices, acting as the key technical interface between global customers and internal engineering teams. The role combines hands-on circuit design, Python scripting and hardware tooling with technical leadership, mentoring and international travel.

• Edinburgh
• Lead

Develops verification and emulation environments for complex Chiplet designs, building UVM-SV scoreboards, functional coverage, and SystemVerilog assertions for formal and simulation. Integrates Cadence VIP and accelerated VIP, manages vPlans in vManager, and maintains automated regression environments using Jenkins and GIT within an experienced Chiplet team.

Cadence Palladium · Cadence VIP · Cadence vManager +3

• Darlington
• Mid-level

Responsible for managing and improving RF and DC wafer-level semiconductor test systems, developing test methodologies such as S-Parameters, Noise Figure and Gauge R&R, and optimising LabVIEW-based automated test applications. Works with Product Engineering and Production on NPI, probe card commissioning, SPC data analysis and fault-finding, while mentoring technicians and operators.

LabVIEW · C++ · C# +7

• Fareham
• £65,000 – £75,000 pa
• Senior

Lead technical integration of advanced semiconductor and touch products into customer devices, combining hands-on circuit design, prototype tooling and system validation. Provide remote and on-site support to global customers, guide regional application teams, mentor engineers and coordinate project planning and documentation.

• Chelmsford

Hands-on role spanning clean-room and office work, owning verification and test across space and science imaging detector projects. You define test flows, commission and script EGSE/OGSE/MGSE equipment, run functional, electrical, mechanical and environmental campaigns to ECSS standards, and train operations staff. Works closely with project, product assurance and manufacturing teams.

MATLAB · Python · Microsoft Excel +6

• Oxford
• Lead · manages people

Lead a three-person electronics team within the Systems group, acting as a player-coach with roughly 60% leadership and 40% hands-on design. Own the electronics roadmap for quantum systems, from schematic capture and PCB layout through board and system-level test, including mixed-signal, high-speed digital and QPU drive architecture, while moving prototypes to rack-ready production.

Altium · Jira · Smartsheet +7