Semiconductor Jobs

• Bristol

Designs and validates high-speed signal paths for AI compute hardware, covering 112Gbps and 224Gbps SERDES, DDR and processor interfaces. Involves PCB structure extraction and simulation, defining launches, vias, transmission lines and stack-ups, plus lab validation with VNAs and oscilloscopes from concept through prototype bring-up and manufacture support.

ANSYS SIWave · HFSS · Mentor HyperLynx +3

• Bristol
• £45,000 pa
• Entry level
• Permanent

Join the Silicon Architecture team to specify, model and evaluate complex SoC subsystems for next-generation AI hardware, with guidance from experienced architects. Work spans architectural modelling, IP assessment, design trade-offs and silicon bring-up, collaborating across design, verification, hardware and software teams. A two-year graduate programme with mentoring and growing ownership.

PCIe · Ethernet · DDR

• Sevenoaks
• Hybrid · 4 days in office
• Entry level

Designs analogue and mixed-signal subsystems for high-speed TIA and laser driver ICs supporting data rates up to 200G, taking ownership of blocks from concept through validation and volume production. Works with layout, verification and product teams on performance, power and area targets, using Cadence tools within a Stansted and Ottawa design centre.

Cadence · Verilog-AMS · SystemVerilog

• Sevenoaks
• Lead

Leads the design and development of high-speed analog ICs from concept through to volume production, acting as technical authority on circuit architecture and chip subsystems. Works across Stansted and Ottawa design centres on transimpedance amplifiers and laser drivers for datacentres, 5G and fibre-to-the-home, mentoring junior engineers and collaborating with cross-functional teams.

Cadence · Verilog-AMS · SystemVerilog +6

• Edinburgh
• Senior

Contribute to pre-silicon verification of analog and mixed-signal products, covering top-level DMS SV/UVM, gate-level simulation, and metric-driven AMS simulations. Bridge verification and validation environments to support post-silicon validation while establishing and improving verification flows and models for a global multi-disciplinary team.

Cadence Xcelium · Cadence IMC · Cadence Virtuoso +7

• Edinburgh
• Senior
• Permanent

Owns architecture definition, modeling and technical leadership for PMIC and advanced DC/DC converter products from concept through silicon validation. Uses tools such as Simplis and Simulink to analyze stability, transient response and fault behavior, and works across analog, digital, verification and test teams to align architecture intent with implementation.

Simplis · Simulink · Multi-Level Converter (MLC)