Semiconductor Jobs

• Cambridge
• Mid-level

Executes verification strategies for mixed-signal IP and FlexICs to ensure right-first-time tapeouts, working closely with digital and analog designers. Builds test bench environments, debugs failures, and produces verification reports and coverage statistics across the design flow. Requires strong SystemVerilog and verification methodology knowledge, with UVM highly desirable.

SystemVerilog · UVM · Verilog-AMS +1

• Bristol
• Lead

Owns yield, quality and cost outcomes for advanced semiconductor products from launch through high-volume manufacturing, spanning chip test, PCBA and rack-scale systems. Partners with OSATs and internal test, quality and data teams, using SPC, DOE and Python/SQL/JMP analysis to turn manufacturing data into action.

Python · SQL · JMP

• Bristol
• Senior

Hands-on role owning reliability of AI compute hardware across lab and data centre environments, leading operational, diagnostic and engineering support. You will diagnose failures in server blades, racks, power, thermal, network and BIOS/BMC systems, driving root cause analysis and improved hardware bring-up and validation practices.

BIOS · BMC

• Darlington
• Mid-level

Responsible for managing and improving RF and DC wafer-level semiconductor test systems, developing test methodologies such as S-Parameters, Noise Figure and Gauge R&R, and optimising LabVIEW-based automated test applications. Works with Product Engineering and Production on NPI, probe card commissioning, SPC data analysis and fault-finding, while mentoring technicians and operators.

LabVIEW · C++ · C# +7

• Darlington

Characterise and model compound semiconductor devices, developing compact models for GaN and GaAs technologies and running DC, pulsed I-V, noise and small/large-signal RF testing. You will build and validate MMIC Process Design Kits, support customer design queries and work with design engineers on new process development. Requires UK nationality and security clearance.

IC-CAP · ADS · Microwave Office +2

• Bristol
• Hybrid · 4 days in office
• Senior

Lead bench PVT characterization for high-speed optical and electrical signal integrity products, developing automated test environments and analyzing complex datasets. Work with an international team across the UK, Canada, US and Mexico, using Python automation and mentoring junior engineers in a lab-based NPI role.

Python

• Bristol
• Hybrid · 4 days in office
• Senior

Architect test strategies for high-speed mixed-signal and RF SiGe products, from first silicon to mass production, covering 200Gbps+ SerDes, CDRs and signal conditioning. Sets DFT and testability standards, builds reusable test IP, and leads NPI transfers to high-volume OSATs while mentoring engineers.

Advantest V93000 · SmarTest 7/8 · C/C++ +7

• Edinburgh
• Hybrid
• Lead · manages people
• Permanent

Lead verification of complex mixed-signal ICs across the full development cycle, from concept and verification planning through implementation, execution and release. Develop UVM and formal testbench architectures, define coverage and closure metrics, debug gate-level simulations, and mentor junior engineers while leading IP or SoC verification efforts.

UVM · SystemVerilog · Makefile +7

• Hayes
• Senior

Field Application Engineer supporting regional accounts across the UK, working with Account Managers and Business Unit specialists to solve complex application-level problems and drive design wins. Involves building customer relationships, identifying new business opportunities, training customers and presenting at seminars, with around 10% travel.

• Oxford
• Hybrid · 3 days in office
• Senior

Integrate all features needed to operate quantum computers into complex multi-layer chips, guiding designs from requirements through layout and tape-out. Work with scientists and fabrication engineers on ion trapping chips, handling metal-track routing and photonics/CMOS interfaces. Hybrid role, three days per week in the Oxford office.

GDSFactory · Cadence

• Oxford
• Hybrid
• Senior

Owns the full lifecycle of electrical reliability fixes on operational trapped-ion quantum computers, from triaging and root-causing control and drive-electronics faults to designing, prototyping and retrofitting permanent solutions. Works across Operations, Science and Manufacturing on fleet-wide upgrades, standardising hardware and building telemetry to reduce downtime.

Altium · ADC · DAC +2

• Edinburgh
• Hybrid
• Lead
• Permanent

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Perforce Helix · Methodics IPLM · Cadence Virtuoso +4

• Swindon
• Hybrid
• Lead
• Permanent

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with Perforce Helix and IPLM-based data management. You will develop Linux-based engineering environments, Python and shell automation, project/workspace methodologies, and migration paths from legacy platforms, while supporting EDA tool integration and training engineering teams.

Perforce Helix · Methodics IPLM · Cadence Virtuoso +3

• Cambridge
• Lead · manages people

Technical leadership role owning product-level characterisation strategy, translating requirements and risks into proportionate test coverage, analysis and reporting. Leads a small team developing automated volume test solutions while hands-on with wafer-level ATE characterisation, RF/analogue test design and large-dataset analysis, presenting findings to stakeholders from project inception through production transfer.

Python · LabVIEW · C# +2

• Burridge
• Hybrid
• £55,000 – £65,000 pa
• Senior

Lead modelling, simulation and analysis of mixed-signal front-end systems, capturing and processing real-time sensor data with analogue and digital signal processing. Develop new touch detection schemes and evolve existing DSP algorithms, working closely with IC design, firmware and validation teams to correlate models with hardware. Own experiments from concept and simulation through to hardware validation.

MATLAB · Simulink · Python +8