Semiconductor Jobs

• Bristol
• Hybrid · 4 days in office
• Senior

Develop, deploy and optimise wafer and package-level test solutions on the Advantest V93000 platform, covering test development, characterisation, qualification support and production ramp-up. Work closely with design, product engineering and offshore OSAT partners across the full product lifecycle, with a focus on high-speed mixed-signal ICs, DFT and yield/test-time improvement.

Advantest V93000

• Bristol
• Hybrid · 4 days in office
• Senior

Architect test strategies for high-speed mixed-signal and RF SiGe products, from first silicon to mass production, covering 200Gbps+ SerDes, CDRs and signal conditioning. Sets DFT and testability standards, builds reusable test IP, and leads NPI transfers to high-volume OSATs while mentoring engineers.

Advantest V93000 · SmarTest 7/8 · C/C++ +7

• Cambridge
• On-site
• Senior
• Permanent

Define and architect test hardware for GaN power devices and ICs, covering fixtures, sockets, probing, switching and multi-site parallel setups for static, dynamic and mixed-signal measurements. Lead test hardware workstreams from concept to release, write specifications, review designs, and mentor engineers while shaping the test equipment roadmap.

HTRB · HTOL

• Farnborough

Design, develop and test embedded software and firmware for specialist engineering applications, contributing across the full lifecycle from research and prototyping to validation and product development. Work within a multidisciplinary team spanning software, FPGA and hardware engineering, with opportunities to broaden expertise across FPGA, DSP, electronics and RF technologies.

Vivado · Vitis · ModelSim +3

• Oxford
• Hybrid
• Senior · manages people
• Permanent

Owns a Python-based performance and power modelling framework predicting how photonic AI hardware runs real inference workloads, covering compute engines, interconnect, memory and bridge interfaces. Characterises operators against hardware, RTL or emulation, builds compiler-agnostic MLIR interfaces and runs benchmarks to give architecture and compiler teams a shared source of truth.

Python · MLIR · UL Procyon +7

• Chelmsford

Hands-on role spanning clean-room and office work, owning verification and test across space and science imaging detector projects. You define test flows, commission and script EGSE/OGSE/MGSE equipment, run functional, electrical, mechanical and environmental campaigns to ECSS standards, and train operations staff. Works closely with project, product assurance and manufacturing teams.

MATLAB · Python · Microsoft Excel +6

• Edinburgh
• Entry level
• Permanent

Support silicon evaluation and applications engineering, working hands-on with real devices, evaluation boards and lab equipment. The intern collects and analyses measurement data, debugs device and board issues, and develops scripts for automated measurements alongside experienced engineers.

Oscilloscopes · Digital Multimeters · Power Supplies +1

• Cambridge
• On-site
• Mid-level
• Permanent

Owns and develops the Quality Management System to ISO 9001 standards, establishing scalable quality and reliability processes for new product introduction, qualification and manufacturing ramp. Leads reliability testing, failure analysis and root cause investigations while managing quality relationships with foundries, OSATs and test providers, and supports customer qualification requirements.

• Cambridge
• On-site
• £45,000 – £55,000 pa
• Mid-level

Own significant blocks of RTL from specification through implementation, verification and into working hardware, focused on physical layer design in the communications space. Work alongside senior and principal engineers on digital RF and fixed-point DSP, with hands-on lab time on AMD/Xilinx FPGA platforms. A new role in a small, established team with low attrition.

AMD · Xilinx · MATLAB

• Edinburgh
• On-site
• Entry level
• Internship

Join a collaborative Edinburgh team developing low-power analog and power-management IP for highly integrated mixed-signal ICs. The intern contributes to architecture, transistor-level design, simulation and verification of DC/DC converter IP such as buck, boost and buck-boost topologies, including analog sub-circuits like error amplifiers, comparators and gate drivers. Work spans behavioural modelling, layout review and potentially laboratory silicon evaluation.

Cadence Virtuoso · Spectre · SIMPLIS +2

• Edinburgh
• Senior

Contribute to pre-silicon verification of analog and mixed-signal products, covering top-level DMS SV/UVM, gate-level simulation, and metric-driven AMS simulations. Bridge verification and validation environments to support post-silicon validation while establishing and improving verification flows and models for a global multi-disciplinary team.

Cadence Xcelium · Cadence IMC · Cadence Virtuoso +7

• Stevenage
• Hybrid · 3–4 days in office
• £90 ph
• Senior
• Contract

Design and verify complex FPGA architectures for signal processing, embedded and safety-critical systems, targeting Xilinx, Intel and Microsemi devices. Work spans VHDL and SystemVerilog/UVM verification, low-level C for test and integration, and documentation within a multidiscipline team on a 12-month contract.

Xilinx · Intel · Microsemi +3

• Southampton
• £30,000 – £75,000 pa
• Mid-level

Hands-on FPGA Engineer role in Southampton, owning the full FPGA lifecycle from design and VHDL simulation to system-level integration and verification. You'll work with SoC devices such as Zynq UltraScale+ and toolchains like Vivado, Quartus and ModelSim, collaborating with system and electronic engineers on high-reliability products.

Vivado · Quartus · ModelSim +1

• Stevenage
• On-site
• Mid-level
• Contract

Work across all phases of the FPGA design and verification cycle, generating complex architectures in VHDL and Simulink for Xilinx, Intel and Microsemi devices. Verify implementations using VHDL and SystemVerilog/UVM testbenches with QuestaSim and ModelSim, and write low-level C for FPGA test and integration within a multidiscipline team.

Xilinx · Intel · Microsemi +3

• Didcot
• Hybrid · 4 days in office
• £41,000 – £67,000 pa
• Senior
• Contract

Develops, tests and optimises FPGA firmware in VHDL or Verilog for next-generation control systems and power electronics, including interfaces to ADCs, DACs, memory and microcontrollers. Involves simulation, verification, lab-based hardware debugging and collaboration with hardware, software and systems engineers. Senior applicants can lead development activities and mentor others.

Xilinx · LTspice · PSpice +6