Semiconductor Jobs

• London
• Hybrid
• Mid-level
• Permanent

Contribute to fundamental and applied AI research, generating ideas, designing experiments and translating them into scalable implementations. Work spans efficient training and inference, world models, reinforcement learning and life sciences, with a focus on hardware-aware algorithms and low-level performance optimisation in C++/CUDA/Triton. Collaborate with silicon and software engineers and publish at NeurIPS, ICML and ICLR.

PyTorch · JAX · CUDA +3

• Cambridge
• Hybrid
• Mid-level
• Permanent

Conducts AI/ML research at Graphcore, generating ideas, designing experiments and translating them into scalable implementations, with a focus on hardware-aware algorithms and performance optimisation. Works with researchers, silicon and software engineers, and publishes at conferences such as NeurIPS, ICML and ICLR. Requires strong Python/PyTorch or JAX skills plus lower-level C++/CUDA/Triton programming.

PyTorch · JAX · XLA +1

• Oxford
• Hybrid
• Senior
• Permanent

Owns dense, high-layer-count PCB layout from schematic handoff to fabrication release, covering stackups, HDI structures, controlled-impedance routing, differential pairs and BGA breakout for large FPGAs and custom ASICs. Acts as the main technical contact with fabricators and assembly houses, and sets the footprint libraries, design rules and CAD standards the team works to.

Cadence Allegro · Altium · Gerber +7

• Oxford
• Hybrid
• Senior
• Permanent

Own signal and power integrity across high-speed boards and packages, running pre-layout channel studies, post-layout SI analysis with IBIS-AMI models, and PDN impedance and DC drop work for high-current ASIC and FPGA rails. The role spans chip, package, interposer, board and optical engine boundaries, with heavy bench correlation using VNAs, TDRs and oscilloscopes to feed design rules.

Ansys HFSS · Ansys SIwave · Keysight ADS +7

• Bristol
• Lead

Lead FPGA and SoC design for airborne imaging and sensor systems, owning architecture for video processing, sensor integration, stabilisation and control. Hands-on work spans RTL development in VHDL/SystemVerilog, simulation, synthesis, timing closure, hardware bring-up and verification, plus mentoring junior engineers and reviewing schematics and constraints.

Xilinx · AMD · Intel +4

• Bristol
• Hybrid
• £80,000 – £900,000 pa
• Senior
• Permanent

Take technical ownership of FPGA and programmable logic design for advanced gimbal payload systems, covering video capture and processing, sensor and high-speed serial interfaces, and real-time pointing and stabilisation control. Lead RTL design, verification, synthesis and hardware bring-up, taking in-house boards from prototype to qualified production while mentoring other engineers.

Altium · Oscilloscopes · Logic Analysers +1

• Whitstable
• On-site
• Mid-level
• Permanent

Hands-on FPGA design role covering the full development lifecycle, from requirements and VHDL design through simulation, verification, synthesis, timing closure and hardware testing. You'll work in a small, cross-disciplinary team on advanced electronic systems for high-reliability applications, with genuine ownership of designs and input into product release.

AMD · Xilinx · Intel +7

• Cambridge
• Hybrid
• Mid-level

Design and implement FPGA-based SoC systems for cutting-edge thermal imaging and augmented reality products, contributing reusable modules to a shared library. Work within a multidisciplinary hardware, software and mechanical team, using VHDL, Verilog, SystemVerilog verification, Python and low-power design techniques.

FPGA · VHDL · Verilog +2

• Cambridge
• Hybrid
• Mid-level

Design and implement FPGA-based SoC systems for cutting-edge thermal imaging and augmented reality products, contributing reusable modules to a shared library. Work in a multidisciplinary team of hardware, software and mechanical engineers, using VHDL, Verilog, SystemVerilog and Python, with a focus on low-power design and timing constraints.

FPGA · VHDL · Verilog +2

• Cambridge
• Hybrid
• £60,000 – £75,000 pa
• Senior

Lead high-speed board-level electronics and FPGA development for a technology consultancy, delivering client projects across varied markets. Also contribute to internal R&D, building prototypes and demonstration platforms, with opportunities for technical leadership and mentoring.

DDR4 · QSPI · PCIe +4

• Guildford
• On-site
• £40,000 – £46,000 pa
• Entry level

Join a multidisciplinary team building integrated software-hardware systems for defence and security, spanning low-power embedded devices to high-throughput server applications. You'll apply C/C++, FPGA, and electronics skills to complex projects combining custom hardware with innovative software, with labs and prototyping facilities on site.

FPGA · VHDL · PCB

• Edinburgh
• £30,000 – £40,000 pa
• Entry level

Join a disruptive semiconductor company designing and validating high-speed digital electronics, FPGA solutions and embedded software. You will build automated test and characterisation rigs in Python, support customer evaluations and demonstrations, and represent the company at trade shows and on international customer visits.

Altium · OrCAD

• Edinburgh
• Senior · manages people
• Permanent

Define test strategies for mixed-signal ICs and develop software and hardware test solutions on ATE platforms such as Advantest V93K, Cohu DiamondX and Teradyne UltraFLEX. The role covers silicon characterisation, production testing, correlation and release at production facilities, plus leading the test development project and mentoring junior engineers.

Advantest V93K · Cohu DiamondX · Teradyne UltraFLEX +2

• Stevenage
• Hybrid
• £85 – £90 ph
• Mid-level
• Contract

Design and verify complex FPGA architectures for defence and security systems, working across the full lifecycle with VHDL, Simulink and SystemVerilog/UVM testbenches. Targets Xilinx, Intel and Microsemi devices, using QuestaSim/ModelSim and low-level C for embedded integration within a multidisciplinary team.

Xilinx · Intel · Microsemi +3

• London
• Hybrid
• Mid-level
• Permanent

Develops FPGA-based digital control hardware for next-generation photonic quantum computing systems, covering architecture, RTL design, simulation, synthesis, timing analysis and verification. Works in a multidisciplinary R&D team with electronics engineers, physicists and software developers on high-speed, low-latency control and signal processing, including ADC/DAC interfacing and hardware bring-up.

Xilinx Vivado · Intel Quartus · ADC +2