Lead Physical Design Engineer
This role involves leading the end-to-end physical implementation of advanced ASIC/SoC chips, from synthesis and floorplanning to sign-off, with a focus on optimising performance, power, and area. The engineer will work closely with RTL, DFT, and process teams, using EDA tools and advanced AI techniques to enhance design quality and productivity. Full-chip ownership and collaboration across disciplines are key aspects of the position.