Semiconductor Jobs

Lumai · Oxford

Owns dense, high-layer-count PCB layout from schematic handoff to fabrication release, covering stackups, HDI structures, controlled-impedance routing, differential pairs and BGA breakout for large FPGAs and custom ASICs. Acts as the main technical contact with fabricators and assembly houses, and sets the footprint libraries, design rules and CAD standards the wider team works to.

Renesas Electronics · Edinburgh

Design and verify CMOS analog blocks such as amplifiers, oscillators, LDOs, comparators and reference/biasing circuits for custom ASICs, balancing performance, area, power and timescale. The role carries technical leadership of sub-systems from specification through to production ramp, guiding layout, DFT and test engineers, driving silicon debug and lab evaluation, and mentoring less experienced team members.

Endeavour Recruitment · Bedford · £43,500 – £54,500 pa

Design and develop mixed electrical/electronic solutions from concept to completion, including analogue, digital, microprocessor, FPGA and power electronics for harsh environments. Based on-site at Ampthill, reporting to the Design Team Lead, the role covers circuit simulation, EMC awareness, testing and technical documentation within a phase-gate process.

Winsearch · Manchester · £50,000 – £57,000 pa

Designs analogue and digital circuits, schematics and PCB layouts for advanced scientific instrumentation, working alongside physicists, software and mechanical engineers. Owns designs from specification through prototyping, testing and volume manufacture, with FPGA work and high-speed digital design. Based in a collaborative R&D team supporting products across their full lifecycle.

Huber+Suhner Polatis · Cambridge

Design, verify and validate FPGA solutions for optical networking products, implementing VHDL logic on Xilinx Artix-7 devices using Vivado. Work spans requirements capture, test benches, timing closure, CDC analysis and lab bring-up with logic analysers, collaborating closely with electronics and software engineers.

Analog Devices · Edinburgh

Lead verification of complex mixed-signal ICs across the full development cycle, from concept and verification planning through implementation, execution and release. Develop UVM and formal testbench architectures, define coverage and closure metrics, debug gate-level simulations, and mentor junior engineers while leading IP or SoC verification efforts.

University of Southampton · Southampton · £46,049 – £58,225 pa

Designs PHY-level and die-to-die interfaces, custom pad circuits, drivers, receivers, ESD structures, termination and clocking for heterogeneous integration demonstrators. Handles floorplanning, I/O ring planning and interface layout across dies, interposers and packaging substrates, and acts as Technical Authority for analog/mixed-signal interfaces while supporting industry partners and workshops.

Lumai · Oxford

Owns signal and power integrity across high-speed boards and packages, running pre-layout channel studies, post-layout SI analysis with IBIS-AMI models, and PDN impedance and DC drop work for high-current ASIC and FPGA rails. Channels span chip, package, interposer, board and optical engine, with heavy bench correlation using VNAs, TDRs and oscilloscopes to feed design rules.

Renesas Electronics · Edinburgh

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Amazon · Cambridge

Architect and implement SoC designs for Blink/Ring smart home cameras and doorbells, owning the flow from RTL delivery through synthesis, power analysis and timing closure. The role also involves defining microarchitecture specs, mentoring junior engineers, and evaluating emerging IP blocks in a vertically integrated environment spanning architectural modelling to post-silicon validation.

Cambridge GaN Devices · Cambridge

Owns the planning and delivery of internal product and technology development projects plus public-funded R&D projects, supporting them from concept and requirements through to completion. Coordinates cross-functional teams, runs project reviews and status meetings, maintains documentation, handles financial reporting and budget tracking, and helps coordinate bid-writing for public-funded work. Reports directly to the VP of R&D and helps shape the project management function as the company grows.

Kingston Barnes Ltd · Pilning · £32,000 – £36,000 pa

Assemble and wire high-tech semiconductor production systems, including soldering, crimping and looming, while reading electrical drawings and fault-finding to implement corrective action. Joins a production team building complex system configurations for micro and nanostructure tooling. Requires a time-served electrical apprenticeship or Level 3 qualification.

Broadcom · United Kingdom-Remote Location

Delivers technical consulting on IBM Mainframe AIOps and automation, covering WLM, System Automation, Omegamon, CA-Sysview, CA OPS/MVS and Netmaster. Works with sales teams on qualification, complex demos, proofs of concept and solution architecture, acting as a subject matter expert for customers and partners. Requires deep mainframe experience, European language skills and around 50% travel.

Vacgen · East Sussex

Hands-on inspection of precision-engineered components and assemblies against drawings and specifications, using Faro Arm/CMM metrology equipment and specialised test gear. Involves investigating non-conformances, root cause analysis, and working with Production and Engineering to reduce defects in an ISO 9001 environment serving vacuum technology for science and space applications.

University of Surrey · Guildford · £38,448 – £46,970 pa

Develops and validates predictive models of source-gated and multimodal transistors on an EPSRC project, using TCAD, compact modelling, surrogate modelling or physics-informed machine learning. Works closely with experimental researchers to fit models against measured data and inform device and circuit design, producing publications and reusable simulation frameworks.