Semiconductor Jobs

• Sevenoaks
• Hybrid · 4 days in office
• Lead · manages people

Leads a multidisciplinary team of analog circuit and layout engineers across multiple high-speed IC product lines, owning the full NPI lifecycle from product definition to volume production. Drives tape-out, qualification, post-silicon bring-up and performance optimisation for TIAs and laser driver ICs up to 200G, working with teams in Stansted and Ottawa.

SAP

• Edinburgh
• On-site
• Entry level
• Internship

Work alongside experienced engineers on the design, simulation, and characterization of high-performance analog and mixed-signal ICs, including amplifiers, filters, data converters, and clocking solutions. Gain hands-on experience with Cadence and SPICE across circuit design, layout, silicon validation, and laboratory testing throughout the full IC development lifecycle.

Cadence · SPICE · Oscilloscopes +3

• Bristol
• Hybrid · 4 days in office
• Lead · manages people

Lead a Bristol team of analog IC design engineers, spanning associate to senior level, with direct oversight of performance, development and recruitment. The role is hands-on, guiding complex design work while managing project schedules, budgets and cross-functional priorities for optical communications ICs such as laser drivers, TIAs and transceivers.

SiGe BiCMOS · CMOS · GaAs +2

• Newbury
• Entry level
• Internship

Contribute to the design, verification, layout and evaluation of analog and mixed-signal circuits for high-precision 16-20 bit, >10MSps SAR A/D converters. Work alongside the High-Speed SAR ADC Group in Newbury, gaining hands-on IC design experience with MATLAB, Verilog and LabVIEW. Internships run 3 to 12 months.

MATLAB · Verilog · LabVIEW

• Cambridge
• Hybrid
• £90,000 – £120,000 pa
• Senior
• Permanent

Lead the transition of advanced semiconductor products into high-volume manufacturing, defining and building the Product Engineering function from the ground up. Manage technical relationships with OSAT and fabrication partners, drive yield improvement, change control and root-cause investigations, and develop control plans and containment strategies. Works closely with design and test teams in a hybrid setup.

OSAT · Yield Analysis Tools · Manufacturing Data Analytics

• Fareham
• £65,000 – £75,000 pa
• Senior

Lead technical integration of advanced semiconductor and touch products into customer devices, combining hands-on circuit design, prototype tooling and system validation. Provide remote and on-site support to global customers, guide regional application teams, mentor engineers and coordinate project planning and documentation.

• Oxford
• Hybrid
• Senior

Lead validation and characterisation of analogue and mixed-signal ASICs for trapped-ion quantum processors, from test planning and platform development through first-silicon bring-up, debug and system integration. The role spans room-temperature and cryogenic (around 4 K) measurements on packaged parts, chip-on-board assemblies and bare die, with heavy Python automation and test PCB work.

Python · Git · SPI +7

• Bristol
• Hybrid · 4 days in office
• Senior

Architect test strategies for high-speed mixed-signal and RF SiGe products, from first silicon to mass production, covering 200Gbps+ SerDes, CDRs and signal conditioning. Sets DFT and testability standards, builds reusable test IP, and leads NPI transfers to high-volume OSATs while mentoring engineers.

Advantest V93000 · SmarTest 7/8 · C/C++ +7

• Sevenoaks
• Hybrid · 4 days in office
• CA$95,000 – CA$122,000 pa
• Senior

Owns new product introduction for high-speed analog and mixed-signal ICs, from concept through volume manufacturing and end-of-life. Defines DfT/DfM requirements, drives ATE test program development, PVT characterisation, ATE-to-bench correlation, yield analysis and DOE-based optimisation. Works cross-functionally with design, test, quality and operations, and mentors junior engineers.

Excel · JMP · Galaxy +6

• Bristol
• Senior

Owns new product introduction for high-speed analog and mixed-signal ICs, from concept through volume manufacturing. Defines DfT/DfM requirements, runs ATE-to-bench correlation and PVT characterization, and drives yield, test-time and cost optimization with design, test and foundry teams. Also mentors junior engineers and leads failure analysis and corrective actions.

Excel · JMP · Galaxy +6

• Bristol
• Hybrid · 4 days in office
• Senior

Develop, deploy and optimise wafer and package-level test solutions on the Advantest V93000 platform, covering test development, characterisation, qualification support and production ramp-up. Work closely with design, product engineering and offshore OSAT partners across the full product lifecycle, with a focus on high-speed mixed-signal ICs, DFT and yield/test-time improvement.

Advantest V93000

• Edinburgh
• Entry level
• Internship

Graduate engineering roles spanning electronic engineering and software development, working alongside hardware teams on planning, systems architecture, design, debugging and testing. Projects cover IoT smart buildings, automotive radar, vital signs monitoring and 5G infrastructure, with growing focus on machine learning and AI. Based across Edinburgh, Glasgow, Newbury and London.

IoT · 5G · Automotive Radar

• Edinburgh
• Entry level
• Internship

Placement students work alongside engineering teams on real, challenging assignments, contributing to product development across electronics, software and computer science. Interns are paired with experienced mentors and treated as extended interview candidates for future full-time roles, with work spanning IoT, automotive radar, healthcare and 5G systems.

5G · IoT