Semiconductor Jobs

76 jobs for “Ai Research Engineer”

Results

Graphcore

AI Research Engineer

  • Cambridge
  • Hybrid
  • Mid-level
  • Permanent

Conducts AI/ML research at Graphcore, generating ideas, designing experiments and translating them into scalable implementations, with a focus on hardware-aware algorithms and performance optimisation. Works with researchers, silicon and software engineers, and publishes at conferences such as NeurIPS, ICML and ICLR. Requires strong Python/PyTorch or JAX skills plus lower-level C++/CUDA/Triton programming.

PyTorch · JAX · XLA +1

4 months ago

Graphcore

Staff Hardware Engineer

  • Bristol
  • Senior

Hands-on role owning reliability of AI compute hardware across lab and data centre environments, leading operational, diagnostic and engineering support. You will diagnose failures in server blades, racks, power, thermal, network and BIOS/BMC systems, driving root cause analysis and improved hardware bring-up and validation practices.

BIOS · BMC

2 weeks ago

Lumai

Senior HW Engineer – Signal and Power Integrity

  • Oxford
  • Hybrid
  • Senior
  • Permanent

Own signal and power integrity across high-speed boards and packages, running pre-layout channel studies, post-layout SI analysis with IBIS-AMI models, and PDN impedance and DC drop work for high-current ASIC and FPGA rails. The role spans chip, package, interposer, board and optical engine boundaries, with heavy bench correlation using VNAs, TDRs and oscilloscopes to feed design rules.

Ansys HFSS · Ansys SIwave · Keysight ADS +7

Last month

Lumai

Senior Embedded Engineer (RTOS)

  • Oxford
  • Hybrid
  • Senior
  • Permanent

Own the embedded software bringing a novel optical AI accelerator to life: Linux kernel and bare-metal device drivers, firmware for control processors, and deterministic RTOS control tasks. Lead board support package bring-up on new custom silicon revisions, debugging with JTAG, scopes and logic analysers, and set the embedded team's coding standards and test methodology.

Linux · JTAG · SWD +3

5 months ago

Analog Devices

FY27 Graduate Engineers United Kingdom

  • Edinburgh
  • Entry level
  • Internship

Graduate engineering roles spanning electronic engineering and software development, working alongside hardware teams on planning, systems architecture, design, debugging and testing. Projects cover IoT smart buildings, automotive radar, vital signs monitoring and 5G infrastructure, with growing focus on machine learning and AI. Based across Edinburgh, Glasgow, Newbury and London.

IoT · 5G · Automotive Radar

6 days ago

Analog Devices

Design Verification Engineering Intern

  • Newbury
  • On-site
  • Entry level
  • Internship

Join the CSS design verification team to validate IP and subsystem-level designs for high-performance semiconductor products. You will develop System Verilog/UVM testbenches, run simulations, debug failures, and track functional and assertion coverage alongside design and architecture engineers.

SystemVerilog · Verilog · UVM +7

3 weeks ago

Platform Recruitment

Hardware Engineer

  • Edinburgh
  • £30,000 – £40,000 pa
  • Entry level

Join a disruptive semiconductor company designing and validating high-speed digital electronics, FPGA solutions and embedded software. You will build automated test and characterisation rigs in Python, support customer evaluations and demonstrations, and represent the company at trade shows and on international customer visits.

Altium · OrCAD

3 weeks ago

Semtech

Senior Characterization Engineer

  • Bristol
  • Hybrid · 4 days in office
  • Senior

Lead bench PVT characterization for high-speed optical and electrical signal integrity products, developing automated test environments and analyzing complex datasets. Work with an international team across the UK, Canada, US and Mexico, using Python automation and mentoring junior engineers in a lab-based NPI role.

Python

Last month

Semtech

Senior NPI Product Engineer

  • Bristol
  • Senior

Owns new product introduction for high-speed analog and mixed-signal ICs, from concept through volume manufacturing. Defines DfT/DfM requirements, runs ATE-to-bench correlation and PVT characterization, and drives yield, test-time and cost optimization with design, test and foundry teams. Also mentors junior engineers and leads failure analysis and corrective actions.

Excel · JMP · Galaxy +6

Last month

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