Semiconductor Jobs

24 jobs

Results

Principal Cybersecurity Marketing Engineer

3 days ago

Renesas Electronics Bourne End

Defines and drives product security strategy across Renesas MCU and MPU platforms, working with product divisions, software teams and ecosystem partners from architecture design to deployment. Represents the company in industry standards bodies and leads compliance with frameworks such as CRA, RED, IEC 62443, SESIP, PSA Certified and FIPS 140-3.

Hybrid Permanent

Principal EDA Engineer

Last week

Renesas Electronics Edinburgh

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Hybrid Permanent

AI Modelling and Simulation Engineer

Last month

Lumai Oxford

Own a Python-based performance and power modelling framework predicting how photonic AI hardware runs real inference workloads, giving architecture and compiler teams a shared source of truth for latency, throughput and power. Model compute engines, interconnect, memory and bridge interfaces, validate against RTL or emulation, and run benchmarks such as UL Procyon, Geekbench AI and LLMs.

Hybrid Permanent

Junior Embedded Engineer (RTOS)

5 months ago

Lumai Oxford

Builds firmware, peripheral drivers and RTOS-based control software for an optical AI accelerator, covering RTOS tasks and IPC, board support package bring-up, boot loaders and first-boot debugging on custom hardware. Works closely with a senior embedded engineer and hardware teams, writing unit and integration tests and maintaining embedded CI pipelines.

Hybrid Permanent

Principal Engineer, Design Verification

12 months ago

Analog Devices Edinburgh

Lead verification of complex mixed-signal ICs across the full development cycle, from concept and verification planning through implementation, execution and release. Develop UVM and formal testbench architectures, define coverage and closure metrics, debug gate-level simulations, and mentor junior engineers while leading IP or SoC verification efforts.

Hybrid Permanent Clearance Required

Optical Systems Engineer

5 months ago

Archangel Lightworks Oxford £25,000 – £60,000 pa

Develops laser communication terminal optical and photonic subsystems, from requirements definition and trade-off analysis through modelling, breadboard testing, and assembly, integration and test. Works closely with the Product Technical Lead and optical engineering team, managing component suppliers and providing technical leadership of subsystem projects, with system-level testing and field trials.

Hybrid Permanent

Principal EDA Engineer

Last week

Renesas Electronics Swindon

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with Perforce Helix and IPLM-based data management. You will develop Linux-based engineering environments, Python and shell automation, project/workspace methodologies, and migration paths from legacy platforms, while supporting EDA tool integration and training engineering teams.

Hybrid Permanent

Senior Embedded Engineer (RTOS)

5 months ago

Lumai Oxford

Owns embedded software for a novel optical AI accelerator, writing Linux kernel and bare-metal device drivers, firmware for control processors, and deterministic RTOS control tasks. Leads board support package bring-up on new custom silicon revisions, debugging with JTAG, scopes and logic analysers, and sets the embedded team's coding standards and test methodology.

Hybrid Permanent

Staff Design Verification Engineer

7 months ago

Renesas Electronics Edinburgh

Owns verification of complex digital and mixed-signal ASIC designs, building SystemVerilog/UVM testbenches and running block-level to full-chip simulation, coverage and regression. Includes gate-level simulation with SDF timing annotation and mentoring junior engineers. Hybrid role with three set office days in Edinburgh.

Hybrid Permanent

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