Semiconductor Jobs

Semtech · Bristol

Architect test strategies for high-speed mixed-signal and RF SiGe products, from first silicon to mass production, covering 200Gbps+ SerDes, CDRs and signal conditioning. Sets DFT and testability standards, builds reusable test IP, and leads NPI transfers to high-volume OSATs while mentoring engineers.

Lumai · Oxford

Owns signal and power integrity across high-speed boards and packages, running pre-layout channel studies, post-layout SI analysis with IBIS-AMI models, and PDN impedance and DC drop work for high-current ASIC and FPGA rails. Channels span chip, package, interposer, board and optical engine, with heavy bench correlation using VNAs, TDRs and oscilloscopes to feed design rules.

Lumai · Oxford

Owns embedded software for a novel optical AI accelerator, writing Linux kernel and bare-metal device drivers, firmware for control processors, and deterministic RTOS control tasks. Leads board support package bring-up on new custom silicon revisions, debugging with JTAG, scopes and logic analysers, and sets the embedded team's coding standards and test methodology.

Renesas Electronics · Bourne End

Defines and drives product security strategy across Renesas MCU and MPU platforms, working with product divisions, software teams and ecosystem partners from architecture design to deployment. Represents the company in industry standards bodies and leads compliance with frameworks such as CRA, RED, IEC 62443, SESIP, PSA Certified and FIPS 140-3.

Renesas Electronics · Swindon

Provides technical leadership for a global EDA/CAD compute and engineering infrastructure, spanning Linux environments, LSF batch compute, EDA license servers, Perforce and project/workspace provisioning. Combines hands-on Python and shell automation with architecture, monitoring and capacity planning, working across engineering, CAD and IT/IS teams to keep semiconductor development environments consistent and reliable worldwide.

IonQ · Oxford

Owns full-chip mixed-signal modelling and verification for cryo-CMOS ASICs used in trapped-ion quantum processors, building Verilog-A/AMS and real-number models correlated against schematic and measured silicon. Leads AMS methodology, sign-off criteria and reviews, runs Cadence AMS/Xcelium-Spectre co-simulation regressions, and mentors engineers through tape-out and bring-up.

Semtech · Bristol

Lead a Bristol team of analog IC design engineers, spanning associate to senior level, with direct oversight of performance, development and recruitment. The role is hands-on, guiding complex design work while managing project schedules, budgets and cross-functional priorities for optical communications ICs such as laser drivers, TIAs and transceivers.

Renesas Electronics · Edinburgh

Provides technical leadership for a global EDA/CAD compute and engineering infrastructure, spanning Linux environments, LSF batch compute, EDA license servers, Perforce and project/workspace provisioning. Combines hands-on engineering with architecture and operational ownership, building Python and shell automation, monitoring dashboards and capacity planning. Works across engineering, CAD and IT/IS teams to keep environments scalable and globally consistent for semiconductor development.

Lumai · Oxford

Own a Python-based performance and power modelling framework predicting how photonic AI hardware runs real inference workloads, giving architecture and compiler teams a shared source of truth for latency, throughput and power. Model compute engines, interconnect, memory and bridge interfaces, validate against RTL or emulation, and run benchmarks such as UL Procyon, Geekbench AI and LLMs.