Semiconductor Jobs

• Bristol

Build and maintain test systems for advanced AI hardware platforms, covering preproduction test across system and board-level products. Define test methods, specify equipment and automate testing for high-speed serial links, high-current power supplies and PCBA debug, working closely with silicon, firmware and production teams.

Python · LabVIEW · Ethernet +4

• Bristol
• Senior

Hands-on role owning reliability of AI compute hardware from lab bring-up to data centre deployment. You will diagnose failures across server blades, racks, power, thermal, network and BIOS/BMC issues, lead root cause analysis and improve hardware diagnostics while guiding junior engineers.

BIOS · BMC

• Newbury
• Senior

Lead the architecture and transistor-level design of mixed-signal ICs such as ADCs, DACs, PLLs and SerDes PHY subsystems for advanced FinFET SoC products. The role sits in the Advanced Cores Group, combining architectural decision-making, design reviews, layout and test guidance with mentoring of junior engineers.

FinFET

• Bristol

Designs and validates high-speed signal paths for AI compute hardware, covering 112Gbps and 224Gbps SERDES, DDR and processor interfaces. Involves PCB structure extraction and simulation, defining launches, vias, transmission lines and stack-ups, plus lab validation with VNAs and oscilloscopes from concept through prototype bring-up and manufacture support.

ANSYS SIWave · HFSS · Mentor HyperLynx +3

• Bristol

Define and implement DFT architecture and features for next-generation AI silicon aimed at data centre applications, developing DFT flows and methodologies and supporting their verification. Work spans structural test vectors, test coverage, scan-based testing and ATPG, alongside silicon bring-up and yield learning with design, verification, physical design and product engineering teams.

VCS · Verdi · Python +3

• Bristol
• £2,500 pm
• Entry level
• Internship

A 12-week summer internship contributing to firmware for next-generation AI hardware, from first boot to system monitoring. You'll write code, develop unit tests and debug behaviour on real hardware using logs, oscilloscopes and logic analysers, working alongside silicon and hardware teams within System Software.

O'Reilly

• Bristol
• Director · manages people

Lead a newly formed characterisation team within Manufacturing Operations, defining bring-up and characterisation strategies for next-generation AI silicon and system platforms. The role is hands-on, shaping lab infrastructure and working across silicon, hardware, manufacturing, architecture and product teams to validate performance under real-world conditions.

ATE

• Bristol
• £45,000 pa
• Entry level
• Permanent

Two-year graduate programme rotating through manufacturing operations teams focused on product test, supporting silicon package assembly, PCBA production, component selection and BoM management. You'll analyse manufacturing and product performance data, investigate issues and help shape tests, working with colleagues in the UK, Taiwan and India.

Python · Linux · Bash +1

• Bristol
• £2,500 pm
• Entry level
• Internship

A 12-week summer internship working on the electronic hardware behind AI compute platforms, focusing on either Hardware Design (schematic and circuit design, PCB development, board bring-up, lab testing) or Signal Integrity (high-speed links like PCIe and Ethernet, DDR memory interfaces, simulation and measurement). Interns work on a scoped design, analysis, validation or debugging task with guidance from Staff Hardware Engineers and Team Leads, using tools such as Mentor Expedition, Ansys HFSS and Keysight ADS.

Mentor Expedition · Ansys HFSS · Keysight ADS +3

• Bristol
• Senior

Develop manufacturing tests for advanced PCB assemblies, analysing designs for testability and manufacturing risks. Build boundary scan and embedded functional tests, diagnose faults to component level, and deploy and support solutions in factory and field environments alongside design and manufacturing teams.

JTAG · Boundary Scan · ICT +5

• Bristol
• Senior · manages people

Lead a team of hardware engineers developing power, timing and control circuits for AI compute hardware, providing schematics and electrical constraints for PCB layout. Line-manage and coach engineers, coordinate reviews and corrective actions, and plan tools and compute resources. Work cross-functionally with SI/PI, layout, mechanical, thermal, systems and firmware teams through to production.

• Bristol
• Hybrid
• Mid-level
• Permanent

Contribute to fundamental and applied AI research, generating ideas, designing experiments and translating them into scalable implementations using PyTorch or JAX. The role emphasises lower-level programming (C++/CUDA/Triton) and hardware-aware optimisation, with work spanning efficient training and inference, world models, reinforcement learning and life sciences, and results published at NeurIPS, ICML and ICLR.

PyTorch · JAX · XLA +1

• London
• Hybrid
• Mid-level
• Permanent

Contribute to fundamental and applied AI research, generating ideas, designing experiments and translating them into scalable implementations. Work spans efficient training and inference, world models, reinforcement learning and life sciences, with a focus on hardware-aware algorithms and low-level performance optimisation in C++/CUDA/Triton. Collaborate with silicon and software engineers and publish at NeurIPS, ICML and ICLR.

PyTorch · JAX · CUDA +3

• Cambridge
• Hybrid
• Mid-level
• Permanent

Conducts AI/ML research at Graphcore, generating ideas, designing experiments and translating them into scalable implementations, with a focus on hardware-aware algorithms and performance optimisation. Works with researchers, silicon and software engineers, and publishes at conferences such as NeurIPS, ICML and ICLR. Requires strong Python/PyTorch or JAX skills plus lower-level C++/CUDA/Triton programming.

PyTorch · JAX · XLA +1

• Bristol
• £45,000 pa
• Entry level
• Permanent

Join the Silicon Architecture team to specify, model and evaluate complex SoC subsystems for next-generation AI hardware, with guidance from experienced architects. Work spans architectural modelling, IP assessment, design trade-offs and silicon bring-up, collaborating across design, verification, hardware and software teams. A two-year graduate programme with mentoring and growing ownership.

PCIe · Ethernet · DDR