Latest Process Engineer Jobs

Staff Mixed-Signal Design Engineer

Lead the architecture and transistor-level design of mixed-signal ICs such as ADCs, DACs, PLLs and SerDes PHY subsystems for advanced FinFET SoC products. The role sits in the Advanced Cores Group, combining architectural decision-making, design reviews, layout and test guidance with mentoring of junior engineers.

Analog Devices Newbury

Clearance Required

Design Verification Engineering Intern

Join the CSS design verification team to validate IP and subsystem-level designs for high-performance semiconductor products. You will develop System Verilog/UVM testbenches, run simulations, debug failures, and track functional and assertion coverage alongside design and architecture engineers.

Analog Devices Newbury

On-site Internship Clearance Required

Sr Staff Field Applications Engineer (FAE)

Serve as technical lead for analog and power solutions, supporting UK and Ireland customers from pre-design through production. Drive design-ins and design-wins via architecture development, schematic and layout reviews, bench validation, and hands-on debug across PMICs, DC/DC, GaN, and signal chain. Act as the field voice back to product divisions while working within the sales team.

Renesas Electronics Bourne End

Permanent

Intern, Analog

Support the design and verification of analog integrated circuit blocks, from transistor-level schematic capture and simulation through layout review and debug. Work alongside experienced engineers on real silicon projects, documenting and presenting findings to the team.

Renesas Electronics Edinburgh

On-site Permanent

Manufacturing Operations Technical Programme Manager – Silicon and Packaging

Owns the end-to-end plan from wafer production through packaged silicon delivery, acting as the key interface between the company, foundry, OSAT partner and internal operations team. Tracks milestones across wafer starts, fab progress, packaging, assembly, final test, qualification and shipment, while managing risks, dependencies and supplier handoffs. Also contributes to building scalable programme management practices across silicon, hardware and software workstreams.

Fractile Bristol

Processor Architect

Define and own the architecture of core compute engines, from ISA and programming models to memory hierarchies and on-chip interconnects. Work hands-on in performance modelling, specification writing, bottleneck analysis and pre/post-silicon validation, partnering closely with logical design, physical design and verification teams to turn architectural intent into working silicon.

Fractile Bristol

Clearance Required

Design Verification Engineering Intern

Hands-on internship in a design verification team, validating IP and subsystem-level designs for high-performance semiconductor products. You will develop System Verilog/UVM testbenches, run simulations, debug failures, create directed and constrained-random tests, and track functional, code and assertion coverage while supporting regression automation with scripting.

Analog Devices Edinburgh

Internship Clearance Required

Lab Technician

Hands-on lab role supporting hardware development and evaluation, building, modifying and repairing electronic hardware. You will assemble and rework PCBs, commission evaluation boards, manage component and equipment inventory, coordinate with suppliers, and train engineers on soldering and lab best practices.

Renesas Electronics Edinburgh

Permanent

Staff Power Architect – System Design

Owns architecture definition, modeling and technical leadership for PMIC and advanced DC/DC converter products from concept through silicon validation. Uses tools such as Simplis and Simulink to analyze stability, transient response and fault behavior, and works across analog, digital, verification and test teams to align architecture intent with implementation.

Renesas Electronics Edinburgh

Permanent

Processor Architect

Define and own the architecture of core compute engines, from ISA and programming models to memory hierarchies and on-chip interconnects. Work hands-on in performance modelling, specification writing, bottleneck analysis and pre/post-silicon validation alongside logical design, physical design and verification teams. Acts as a technical mentor and represents compute engine architecture in reviews and customer engagements.

Fractile London

Clearance Required

Lead RTL Designer (PPA Experience)

Drive datapath microarchitecture and RTL design for high-performance AI inference chips, owning PPA closure end-to-end from bottleneck identification to timing sign-off. Work closely with physical design, synthesis and modelling teams on pipelining, retiming and low-power techniques for fixed-point, floating-point and quantized arithmetic.

Fractile Bristol

Clearance Required

Grid Insights Architect

Hands-on principal-level role owning the design and development of signal processing and machine learning algorithms for power system monitoring, asset health and grid analytics. Work spans the full pipeline from modelling and simulation to deployment across edge-to-cloud and embedded platforms, collaborating with hardware, firmware and data teams and engaging utilities and grid equipment OEMs. Includes mentoring engineers with a pathway to broader technical leadership.

Analog Devices Edinburgh

Clearance Required

Analog/Mixed Signal Design Intern

Contribute to the design, verification, layout and evaluation of analog and mixed-signal circuits for high-precision 16-20 bit, >10MSps SAR A/D converters. Work alongside the High-Speed SAR ADC Group in Newbury, gaining hands-on IC design experience with MATLAB, Verilog and LabVIEW. Internships run 3 to 12 months.

Analog Devices Newbury

Internship Clearance Required