Semiconductor Jobs

• Bristol

You will build and maintain test systems for AI hardware platforms, defining test methods, specifying equipment and automating checks for high-speed serial links, high-current power supplies and PCBA debug. Embedded in the Hardware Test team, you work closely with silicon, firmware and production groups, improving coverage and transferring robust solutions into production.

Ethernet · PCIe · Python +4

• Bristol
• Senior

Hands-on role owning reliability of AI compute hardware across lab and data centre environments, leading operational, diagnostic and engineering support. You will diagnose failures in server blades, racks, power, thermal, network and BIOS/BMC systems, driving root cause analysis and improved hardware bring-up and validation practices.

BIOS · BMC

• Oxford
• Hybrid
• Junior
• Permanent

Builds firmware, peripheral drivers and RTOS-based control software for an optical AI accelerator, covering RTOS tasks and IPC, board support package bring-up, boot loaders and first-boot debugging on custom hardware. Works closely with a senior embedded engineer and hardware teams, writing unit and integration tests and maintaining embedded CI pipelines.

FreeRTOS · Zephyr · JTAG +7

• Oxford
• Hybrid
• Senior · manages people
• Permanent

Owns a Python-based performance and power modelling framework predicting how photonic AI hardware runs real inference workloads, covering compute engines, interconnect, memory and bridge interfaces. Characterises operators against hardware, RTL or emulation, builds compiler-agnostic MLIR interfaces and runs benchmarks to give architecture and compiler teams a shared source of truth.

Python · MLIR · UL Procyon +7

• London
• Hybrid
• Mid-level
• Permanent

Develops FPGA-based digital control hardware for next-generation photonic quantum computing systems, covering architecture, RTL design, simulation, synthesis, timing analysis and verification. Works in a multidisciplinary R&D team with electronics engineers, physicists and software developers on high-speed, low-latency control and signal processing, including ADC/DAC interfacing and hardware bring-up.

Xilinx Vivado · Intel Quartus · ADC +2

• Edinburgh
• Hybrid · 3 days in office
• Senior
• Permanent

Owns verification of complex digital and mixed-signal ASIC designs, building SystemVerilog/UVM testbenches and running block-level to full-chip simulation, coverage and regression. Includes gate-level simulation with SDF timing annotation and mentoring junior engineers. Hybrid role with three set office days in Edinburgh.

Synopsys VCS · Cadence Xcelium · Tcl +4

• Edinburgh
• Senior

Implements and verifies digital logic for mixed-signal SoCs used in high-performance power systems, covering RTL development, synthesis, static timing analysis and DFT insertion. Works with analog, firmware and validation teams on integration, silicon bring-up and lab debug, with scope to improve methodology and automation.

Genus · Innovus · Tempus +4

• Swansea
• On-site
• Mid-level
• Shift work

Provide first-line engineering support for wafer fabrication and epitaxy equipment, covering fault diagnosis, repair and preventative maintenance on lithography, etch, PVD, PECVD and MOVPE reactor systems. The role also involves managing chemical and specialist gas supply systems, spare parts inventory and continuous improvement work such as Kaizen, 6S and 8D. It is based in a cleanroom on a continental shift pattern, including SCBA use and emergency response duties.

Lithography · Etch · PVD +7

• Oxford
• £80,000 – £120,000 pa
• Lead

Lead the architecture and full lifecycle delivery of high-throughput FPGA subsystems for next-generation medical device platforms, from requirements through RTL implementation, ASIC bring-up and lab validation. The role combines hands-on SystemVerilog/Verilog design using AMD/Xilinx toolchains with technical leadership, mentoring mid/senior engineers and championing CI/CD automation.

AMD · Xilinx · Vivado +3

• Bourne End
• Senior
• Permanent

Serve as technical lead for analog and power solutions, supporting UK and Ireland customers from pre-design through production. Drive design-ins and design-wins via architecture development, schematic and layout reviews, bench validation, and hands-on debug across PMICs, DC/DC, GaN, and signal chain. Act as the field voice back to product divisions while working within the sales team.

PMICs · DC/DC · GaN +7

• Lincoln
• On-site
• £42,500 – £52,500 pa
• Mid-level
• Permanent

Design, develop and test FPGA-based systems for real-time RF and signal processing in an electronic warfare context. Work hands-on with RFSoC platforms, high-speed ADC/DAC interfaces, VHDL/SystemVerilog and MATLAB/Simulink, supporting lab integration and test with RF instrumentation. Mostly on-site in Lincoln alongside domain specialists and MOD/RAF customer environments.

RFSoC · Vivado · Quartus +5

• Newbury
• Entry level
• Internship

Contribute to the design, verification, layout and evaluation of analog and mixed-signal circuits for high-precision 16-20 bit, >10MSps SAR A/D converters. Work alongside the High-Speed SAR ADC Group in Newbury, gaining hands-on IC design experience with MATLAB, Verilog and LabVIEW. Internships run 3 to 12 months.

MATLAB · Verilog · LabVIEW

• Chelmsford

Hands-on role spanning clean-room and office work, owning verification and test across space and science imaging detector projects. You define test flows, commission and script EGSE/OGSE/MGSE equipment, run functional, electrical, mechanical and environmental campaigns to ECSS standards, and train operations staff. Works closely with project, product assurance and manufacturing teams.

MATLAB · Python · Microsoft Excel +6

• Sevenoaks
• Hybrid · 4 days in office
• Entry level

Designs analogue and mixed-signal subsystems for high-speed TIA and laser driver ICs supporting data rates up to 200G, taking ownership of blocks from concept through validation and volume production. Works with layout, verification and product teams on performance, power and area targets, using Cadence tools within a Stansted and Ottawa design centre.

Cadence · Verilog-AMS · SystemVerilog

• Sevenoaks
• Lead

Leads the design and development of high-speed analog ICs from concept through to volume production, acting as technical authority on circuit architecture and chip subsystems. Works across Stansted and Ottawa design centres on transimpedance amplifiers and laser drivers for datacentres, 5G and fibre-to-the-home, mentoring junior engineers and collaborating with cross-functional teams.

Cadence · Verilog-AMS · SystemVerilog +6