Semiconductor Jobs

Semtech · Sevenoaks · CA$95,000 – CA$122,000 pa

Owns new product introduction for high-speed analog and mixed-signal ICs, from concept through volume manufacturing and end-of-life. Defines DfT/DfM requirements, drives ATE test program development, PVT characterisation, ATE-to-bench correlation, yield analysis and DOE-based optimisation. Works cross-functionally with design, test, quality and operations, and mentors junior engineers.

Gold Group · Bedford · £54 – £64 ph

Lead the design, development and support of mixed electrical/electronic LRU solutions from concept to completion through a phase-gate process, including analogue, digital, microprocessor and FPGA circuitry, schematic capture and PCB layout. The role provides technical governance to the team, reviews supplier capabilities and produces documentation, working on-site two mandatory days a week.

Morson Edge · Spalding · £60 – £90 ph

Deliver FPGA firmware for defence, transportation and aerospace products, covering architecture, requirements, design, verification and validation. Work alongside systems, software and hardware engineers using VHDL, SystemVerilog, C++ and tools such as ModelSim/QuestaSim, with a mix of on-site and remote working plus customer site visits.

Lumai · Oxford

Owns dense, high-layer-count PCB layout from schematic handoff to fabrication release, covering stackups, HDI structures, controlled-impedance routing, differential pairs and BGA breakout for large FPGAs and custom ASICs. Acts as the main technical contact with fabricators and assembly houses, and sets the footprint libraries, design rules and CAD standards the wider team works to.

Semtech · Bristol

Lead bench PVT characterization for high-speed optical and electrical signal integrity products, developing automated test environments and analyzing complex datasets. Work with an international team across the UK, Canada, US and Mexico, using Python automation and mentoring junior engineers in a lab-based NPI role.

Analog Devices · Edinburgh

Lead verification of complex mixed-signal ICs across the full development cycle, from concept and verification planning through implementation, execution and release. Develop UVM and formal testbench architectures, define coverage and closure metrics, debug gate-level simulations, and mentor junior engineers while leading IP or SoC verification efforts.

IonQ · Oxford

Owns the full lifecycle of electrical reliability fixes on operational trapped-ion quantum computers, from triaging and root-causing control and drive-electronics faults to designing, prototyping and retrofitting permanent solutions. Works across Operations, Science and Manufacturing on fleet-wide upgrades, standardising hardware and building telemetry to reduce downtime.

IonQ · Oxford

Integrate all features needed to operate quantum computers into complex multi-layer ion-trapping chips, guiding designs from requirements through layout and tape-out. Work closely with scientists and fabrication engineers on metal-track routing and photonics/CMOS interfaces, using GDSFactory in Python and Cadence. Hybrid role, three days per week in the Oxford office.

Lumai · Oxford

Owns signal and power integrity across high-speed boards and packages, running pre-layout channel studies, post-layout SI analysis with IBIS-AMI models, and PDN impedance and DC drop work for high-current ASIC and FPGA rails. Channels span chip, package, interposer, board and optical engine, with heavy bench correlation using VNAs, TDRs and oscilloscopes to feed design rules.

Renesas Electronics · Edinburgh

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Renesas Electronics · Swindon

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with Perforce Helix and IPLM-based data management. You will develop Linux-based engineering environments, Python and shell automation, project/workspace methodologies, and migration paths from legacy platforms, while supporting EDA tool integration and training engineering teams.

Broadcom · United Kingdom-Remote Location

Delivers technical consulting on IBM Mainframe AIOps and automation, covering WLM, System Automation, Omegamon, CA-Sysview, CA OPS/MVS and Netmaster. Works with sales teams on qualification, complex demos, proofs of concept and solution architecture, acting as a subject matter expert for customers and partners. Requires deep mainframe experience, European language skills and around 50% travel.