Semiconductor Jobs

IonQ · Oxford

Owns full-chip mixed-signal modelling and verification for cryo-CMOS ASICs used in trapped-ion quantum processors, building Verilog-A/AMS and real-number models correlated against schematic and measured silicon. Leads AMS methodology, sign-off criteria and reviews, runs Cadence AMS/Xcelium-Spectre co-simulation regressions, and mentors engineers through tape-out and bring-up.

IonQ · Oxford

Owns the full lifecycle of electrical reliability fixes on operational trapped-ion quantum computers, from triaging and root-causing control and drive-electronics faults to designing, prototyping and retrofitting permanent solutions. Works across Operations, Science and Manufacturing on fleet-wide upgrades, standardising hardware and building telemetry to reduce downtime.

Cambridge GaN Devices · Cambridge

Design and layout of GaN power ICs using EDA tools, covering schematic capture, analog simulation, chip layout review, PEX and PLS. The role also involves wafer-level and packaged device testing, SPICE model development, and supporting patent and IP management within a growing R&D engineering team.

Cambridge GaN Devices · Cambridge

Define and architect test hardware for GaN power devices and ICs, covering fixtures, sockets, probing, switching and multi-site parallel setups for static, dynamic and mixed-signal measurements. Lead test hardware workstreams from concept to release, write specifications, review designs, and mentor engineers while shaping the test equipment roadmap.

Renesas Electronics · Bourne End

Defines and drives product security strategy across Renesas MCU and MPU platforms, working with product divisions, software teams and ecosystem partners from architecture design to deployment. Represents the company in industry standards bodies and leads compliance with frameworks such as CRA, RED, IEC 62443, SESIP, PSA Certified and FIPS 140-3.

Renesas Electronics · Edinburgh

Lead the design and verification of CMOS analog blocks for custom mixed-signal ASICs, taking technical ownership of full-chip or major system-level blocks from specification through to production ramp. The role combines hands-on circuit design with mentoring a team of engineers, working alongside digital, layout, DFT and test teams, and driving silicon debug and characterisation.

Forefront RF · Cambridge

Hands-on technical lead for RF subsystem design, simulation and validation, covering circuits such as LNAs, PAs, filters and duplexers. Owns performance, quality and delivery against system architecture, runs design reviews and verification (S-parameters, NF, phase noise, EVM, ACPR), and mentors RF engineers while working with the System Architect and manufacturing teams.

Semtech · Bristol

Drive validation strategy for next-generation high-speed semiconductor devices, architecting end-to-end test solutions spanning software, hardware and documentation. Build Python or LabVIEW automation, take precision lab measurements at 10Gbit/s and above, and apply signal integrity expertise to schematic entry and PCB layout in Altium. Lead validation reviews and mentor engineers within a Bristol R&D team.

Semtech · Bristol

Graduate role validating next-generation high-speed semiconductor devices, working hands-on in the lab from week one. You'll build test automation in Python or LabVIEW, take measurements on components running at 10Gbit/s and above, and learn high-speed signal integrity with Altium PCB tools. Based in Bristol, hybrid with four days in office.

Pragmatic Semiconductor · Durham

Support 300mm wafer fabs by introducing new process technology, ramping yield and providing RMA support. Monitor electrical performance, SPC and OOC parameters, run DOEs and drive defect characterisation and root-cause analysis. Work closely with process integration, principal engineers and cross-functional teams on high-volume manufacturing.

Pragmatic Semiconductor · Cambridge

Technical leadership role owning product-level characterisation strategy, translating requirements and risks into proportionate test coverage, analysis and reporting. Leads a small team developing automated volume test solutions while hands-on with wafer-level ATE characterisation, RF/analogue test design and large-dataset analysis, presenting findings to stakeholders from project inception through production transfer.

Platform Recruitment · United Kingdom · £55,000 – £75,000 pa

Design and develop advanced sensing electronics from concept through multi-layer PCB layout and manufacture, using Altium, Xilinx FPGAs and DSP techniques. Lead testing, failure analysis and root-cause repair of high-precision systems while working with technical directors on analogue and data-acquisition challenges. A visible technical-authority role within a small expert team.

Reperio Human Capital · Cork, Ireland · £103,589 – £129,486 pa

Lead and grow a verification team while remaining hands-on with mixed-signal power ICs. You define verification strategy, methodology and sign-off criteria, architect UVM/SystemVerilog environments at block, subsystem and SoC level, and own verification plans, regressions and coverage closure. Works closely with design, firmware, applications and test teams, with three days a week on site in Cork.

Redline Group · Glasgow · £60,000 – £80,000 pa

Lead the test department, providing and maintaining in-circuit and functional test equipment for in-house production. Requires developing PCBA test solutions, ideally on Keysight platforms, plus managing a test engineering team through mentoring, performance management and hiring. Based in East Sussex within a semiconductor market leader.

NVIDIA · Reading

Lead security research, architecture and implementation for next-generation networking products, taking a hands-on role in hardware and software security design. Work across teams and with external partners on IO interfaces, boot architecture, RISC-V, root-of-trust and secure platforms, guiding open-source implementation and customer threat resolution.