39 jobs
Platform Recruitment Stevenage £65 ph
Design and implement DSP algorithms for advanced communications and sensing systems, developing FPGA firmware using VHDL/Verilog. Work closely with multidisciplinary teams to translate system requirements into firmware solutions and support hardware integration and debugging. Focus on simulation, verification, and formal configuration control throughout the development lifecycle.
Avanti Recruitment Southampton £50,000 – £80,000 pa
Hands-on role across the full FPGA development lifecycle, covering VHDL design, verification and SoC-based systems using Xilinx devices and Vivado. Work spans video/image processing, high-speed data, signal processing and embedded integration for defence and mission-critical products, with ownership of technical decisions and mentoring of junior engineers.
Semtech Bristol
Owns test strategy and architecture for major semiconductor product lines on the Advantest V93000 platform, writing test plans and coverage objectives rather than executing someone else's. Leads complex test program development, statistical and adaptive test methods, yield and quality improvement, and test technology roadmaps while mentoring engineers. Hybrid role based in Bristol with Monday–Thursday onsite and up to 20% travel.
Semtech Bristol
Lead bench PVT characterization for high-speed optical and electrical signal integrity products, developing automated test environments and analyzing complex datasets. Work with an international team across the UK, Canada, US and Mexico, using Python automation and mentoring junior engineers in a lab-based NPI role.
Archangel Lightworks Oxford £25,000 – £60,000 pa
Develops laser communication terminal optical and photonic subsystems, from requirements definition and trade-off analysis through modelling, breadboard testing, and assembly, integration and test. Works closely with the Product Technical Lead and optical engineering team, managing component suppliers and providing technical leadership of subsystem projects, with system-level testing and field trials.
NVIDIA Cambridge
Develops algorithms and optimizations for NVIDIA's LPX inference and compiler stack, building high-performance runtime and compiler components and mapping large-scale neural network workloads onto future hardware. Involves LLVM/MLIR work, graph transformations, scheduling and memory/layout optimizations, plus close codesign with hardware architects.
NVIDIA United Kingdom
Develop algorithms and optimizations for NVIDIA's LPX inference and compiler stack, working at the intersection of large-scale systems, compilers, and deep learning. The role involves building high-performance runtime and compiler components, mapping inference workloads onto future hardware, and collaborating with hardware architects on codesign. Distinct for its focus on LLVM/MLIR-based compilation for spatial accelerators and publishing at top-tier venues.
Semtech Bristol
Architect test strategies for high-speed mixed-signal and RF SiGe products, from first silicon to mass production, covering 200Gbps+ SerDes, CDRs and signal conditioning. Sets DFT and testability standards, builds reusable test IP, and leads NPI transfers to high-volume OSATs while mentoring engineers.
Semtech Bristol
Develop, deploy and optimise wafer and package-level test solutions on the Advantest V93000 platform, covering test development, characterisation, qualification support and production ramp-up. Work closely with design, product engineering and offshore OSAT partners across the full product lifecycle, with a focus on high-speed mixed-signal ICs, DFT and yield/test-time improvement.
