Semiconductor Jobs

81 jobs for “Process Engineer”

Results

Equipment Engineer (Photolithography)

3 weeks ago

Pragmatic Semiconductor Durham

Responsible for maintaining, installing and fault-finding 300mm photolithography equipment including steppers, wafer tracks and bake tools, while supporting production operators and minimising tool downtime. Involves training technicians, developing maintenance procedures and reporting on equipment KPIs within a cleanroom semiconductor scale-up environment.

On-site Permanent Shift-work

IC Verification Engineer

Last week

Pragmatic Semiconductor Cambridge

Executes verification strategies for mixed-signal IP and FlexICs to ensure right-first-time tapeouts, working closely with digital and analog designers. Builds test bench environments, debugs failures, and produces verification reports and coverage statistics across the design flow. Requires strong SystemVerilog and verification methodology knowledge, with UVM highly desirable.

Principal EDA Engineer

Last week

Renesas Electronics Edinburgh

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Hybrid Permanent

Principal EDA Engineer

Last week

Renesas Electronics Swindon

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with Perforce Helix and IPLM-based data management. You will develop Linux-based engineering environments, Python and shell automation, project/workspace methodologies, and migration paths from legacy platforms, while supporting EDA tool integration and training engineering teams.

Hybrid Permanent

Senior Embedded Engineer (RTOS)

5 months ago

Lumai Oxford

Owns embedded software for a novel optical AI accelerator, writing Linux kernel and bare-metal device drivers, firmware for control processors, and deterministic RTOS control tasks. Leads board support package bring-up on new custom silicon revisions, debugging with JTAG, scopes and logic analysers, and sets the embedded team's coding standards and test methodology.

Hybrid Permanent

Senior Digital Design Engineer

Last week

Analog Devices Edinburgh

Implements and verifies digital logic for mixed-signal SoCs used in high-performance power systems, covering RTL development, synthesis, static timing analysis and DFT insertion. Works with analog, firmware and validation teams on integration, silicon bring-up and lab debug, with scope to improve methodology and automation.

Staff Design Verification Engineer

Last month

Analog Devices Edinburgh

Contribute to pre-silicon verification of analog and mixed-signal products, covering top-level DMS SV/UVM, gate-level simulation, and metric-driven AMS simulations. Bridge verification and validation environments to support post-silicon validation while establishing and improving verification flows and models for a global multi-disciplinary team.

Clearance Required

AI Modelling and Simulation Engineer

Last month

Lumai Oxford

Own a Python-based performance and power modelling framework predicting how photonic AI hardware runs real inference workloads, giving architecture and compiler teams a shared source of truth for latency, throughput and power. Model compute engines, interconnect, memory and bridge interfaces, validate against RTL or emulation, and run benchmarks such as UL Procyon, Geekbench AI and LLMs.

Hybrid Permanent
IonQ logo

Staff Analog Mixed-Signal Design and Modelling Engineer

2 weeks ago

IonQ Oxford

Owns full-chip mixed-signal modelling and verification for cryo-CMOS ASICs used in trapped-ion quantum processors, building Verilog-A/AMS and real-number models correlated against schematic and measured silicon. Leads AMS methodology, sign-off criteria and reviews, runs Cadence AMS/Xcelium-Spectre co-simulation regressions, and mentors engineers through tape-out and bring-up.

Hybrid Clearance Required

Sr. ASIC Design Engineer, Blink/Ring ASIC Team

2 months ago

Amazon Cambridge

Architect and implement SoC designs for Blink/Ring smart home cameras and doorbells, owning the flow from RTL delivery through synthesis, power analysis and timing closure. The role also involves defining microarchitecture specs, mentoring junior engineers, and evaluating emerging IP blocks in a vertically integrated environment spanning architectural modelling to post-silicon validation.

Permanent

Manager - Analog IC Design

3 weeks ago

Semtech Bristol

Lead a Bristol team of analog IC design engineers, spanning associate to senior level, with direct oversight of performance, development and recruitment. The role is hands-on, guiding complex design work while managing project schedules, budgets and cross-functional priorities for optical communications ICs such as laser drivers, TIAs and transceivers.

Hybrid
Cambridge GaN Devices logo

R&D Project Manager

6 months ago

Cambridge GaN Devices Cambridge

Owns the planning and delivery of internal product and technology development projects plus public-funded R&D projects, supporting them from concept and requirements through to completion. Coordinates cross-functional teams, runs project reviews and status meetings, maintains documentation, handles financial reporting and budget tracking, and helps coordinate bid-writing for public-funded work. Reports directly to the VP of R&D and helps shape the project management function as the company grows.

On-site Permanent

Mainframe Technical Consultant - Mainframe AIOPS

3 months ago

Broadcom United Kingdom-Remote Location

Delivers technical consulting on IBM Mainframe AIOps and automation, covering WLM, System Automation, Omegamon, CA-Sysview, CA OPS/MVS and Netmaster. Works with sales teams on qualification, complex demos, proofs of concept and solution architecture, acting as a subject matter expert for customers and partners. Requires deep mainframe experience, European language skills and around 50% travel.

Remote Permanent

Quality Inspector

Last month

Vacgen East Sussex

Hands-on inspection of precision-engineered components and assemblies against drawings and specifications, using Faro Arm/CMM metrology equipment and specialised test gear. Involves investigating non-conformances, root cause analysis, and working with Production and Engineering to reduce defects in an ISO 9001 environment serving vacuum technology for science and space applications.

On-site Permanent
University of Surrey logo

Research Fellow in Advanced Semiconductor Device Modelling

3 weeks ago

University of Surrey Guildford £38,448 – £46,970 pa

Develops and validates predictive models of source-gated and multimodal transistors on an EPSRC project, using TCAD, compact modelling, surrogate modelling or physics-informed machine learning. Works closely with experimental researchers to fit models against measured data and inform device and circuit design, producing publications and reusable simulation frameworks.

Contract

Get new Process Engineer roles by email. One email a morning when new roles match. Stop any time. Alerts don't use filters, so you'll hear about every role for this search, not just Mid-level, Senior, Lead, Director.