Semiconductor Jobs

IonQ · Oxford

Owns the full lifecycle of electrical reliability fixes on operational trapped-ion quantum computers, from triaging and root-causing control and drive-electronics faults to designing, prototyping and retrofitting permanent solutions. Works across Operations, Science and Manufacturing on fleet-wide upgrades, standardising hardware and building telemetry to reduce downtime.

IonQ · Oxford

Architect and maintain UVM/SystemVerilog verification environments for complex FPGA designs, defining verification plans with constrained-random testing and functional coverage. Build automated regression suites and CI pipelines, collaborating with RTL engineers to debug and ensure reliable quantum control systems.

Lumai · Oxford

Own a Python-based performance and power modelling framework predicting how photonic AI hardware runs real inference workloads, giving architecture and compiler teams a shared source of truth for latency, throughput and power. Model compute engines, interconnect, memory and bridge interfaces, validate against RTL or emulation, and run benchmarks such as UL Procyon, Geekbench AI and LLMs.

Lumai · Oxford

Builds firmware, peripheral drivers and RTOS-based control software for an optical AI accelerator, covering RTOS tasks and IPC, board support package bring-up, boot loaders and first-boot debugging on custom hardware. Works closely with a senior embedded engineer and hardware teams, writing unit and integration tests and maintaining embedded CI pipelines.

Renesas Electronics · Edinburgh

Owns verification of complex digital and mixed-signal ASIC designs, building SystemVerilog/UVM testbenches and running block-level to full-chip simulation, coverage and regression. Includes gate-level simulation with SDF timing annotation and mentoring junior engineers. Hybrid role with three set office days in Edinburgh.

Morson Edge · West Sussex · £60 – £90 ph

Deliver FPGA firmware for defence, transportation and aerospace products, covering architecture, requirements, design, verification and validation. Work alongside systems, software and hardware engineers using VHDL, SystemVerilog, C++ and tools such as ModelSim/QuestaSim, with a mix of on-site and remote working plus customer site visits.

Semtech · Sevenoaks · CA$95,000 – CA$122,000 pa

Owns new product introduction for high-speed analog and mixed-signal ICs, from concept through volume manufacturing and end-of-life. Defines DfT/DfM requirements, drives ATE test program development, PVT characterisation, ATE-to-bench correlation, yield analysis and DOE-based optimisation. Works cross-functionally with design, test, quality and operations, and mentors junior engineers.

Avanti Recruitment · Southampton · £50,000 – £80,000 pa

Hands-on role across the full FPGA development lifecycle, covering VHDL design, verification and SoC-based systems using Xilinx devices and Vivado. Work spans video/image processing, high-speed data, signal processing and embedded integration for defence and mission-critical products, with ownership of technical decisions and mentoring of junior engineers.

Semtech · Bristol

Owns test strategy and architecture for major semiconductor product lines on the Advantest V93000 platform, writing test plans and coverage objectives rather than executing someone else's. Leads complex test program development, statistical and adaptive test methods, yield and quality improvement, and test technology roadmaps while mentoring engineers. Hybrid role based in Bristol with Monday–Thursday onsite and up to 20% travel.

NVIDIA · Cambridge

Develops algorithms and optimizations for NVIDIA's LPX inference and compiler stack, building high-performance runtime and compiler components and mapping large-scale neural network workloads onto future hardware. Involves LLVM/MLIR work, graph transformations, scheduling and memory/layout optimizations, plus close codesign with hardware architects.

NVIDIA · United Kingdom

Develop algorithms and optimizations for NVIDIA's LPX inference and compiler stack, working at the intersection of large-scale systems, compilers, and deep learning. The role involves building high-performance runtime and compiler components, mapping inference workloads onto future hardware, and collaborating with hardware architects on codesign. Distinct for its focus on LLVM/MLIR-based compilation for spatial accelerators and publishing at top-tier venues.

Lumai · Oxford

Owns embedded software for a novel optical AI accelerator, writing Linux kernel and bare-metal device drivers, firmware for control processors, and deterministic RTOS control tasks. Leads board support package bring-up on new custom silicon revisions, debugging with JTAG, scopes and logic analysers, and sets the embedded team's coding standards and test methodology.

Semtech · Bristol

Lead bench PVT characterization for high-speed optical and electrical signal integrity products, developing automated test environments and analyzing complex datasets. Work with an international team across the UK, Canada, US and Mexico, using Python automation and mentoring junior engineers in a lab-based NPI role.

Semtech · Bristol

Architect test strategies for high-speed mixed-signal and RF SiGe products, from first silicon to mass production, covering 200Gbps+ SerDes, CDRs and signal conditioning. Sets DFT and testability standards, builds reusable test IP, and leads NPI transfers to high-volume OSATs while mentoring engineers.

Semtech · Bristol

Develop, deploy and optimise wafer and package-level test solutions on the Advantest V93000 platform, covering test development, characterisation, qualification support and production ramp-up. Work closely with design, product engineering and offshore OSAT partners across the full product lifecycle, with a focus on high-speed mixed-signal ICs, DFT and yield/test-time improvement.