Semiconductor Jobs

15 jobs for “Process Engineer”

Results

Senior NPI Product Engineer

2 weeks ago

Semtech Sevenoaks CA$95,000 – CA$122,000 pa

Owns new product introduction for high-speed analog and mixed-signal ICs, from concept through volume manufacturing and end-of-life. Defines DfT/DfM requirements, drives ATE test program development, PVT characterisation, ATE-to-bench correlation, yield analysis and DOE-based optimisation. Works cross-functionally with design, test, quality and operations, and mentors junior engineers.

Hybrid

Firmware Engineer

3 weeks ago

Morson Edge Spalding £60 – £90 ph

Deliver FPGA firmware for defence, transportation and aerospace products, covering architecture, requirements, design, verification and validation. Work alongside systems, software and hardware engineers using VHDL, SystemVerilog, C++ and tools such as ModelSim/QuestaSim, with a mix of on-site and remote working plus customer site visits.

Hybrid Clearance Required

Junior Embedded Engineer (RTOS)

5 months ago

Lumai Oxford

Builds firmware, peripheral drivers and RTOS-based control software for an optical AI accelerator, covering RTOS tasks and IPC, board support package bring-up, boot loaders and first-boot debugging on custom hardware. Works closely with a senior embedded engineer and hardware teams, writing unit and integration tests and maintaining embedded CI pipelines.

Hybrid Permanent

Senior HW Engineer – PCB Layout

2 weeks ago

Lumai Oxford

Owns dense, high-layer-count PCB layout from schematic handoff to fabrication release, covering stackups, HDI structures, controlled-impedance routing, differential pairs and BGA breakout for large FPGAs and custom ASICs. Acts as the main technical contact with fabricators and assembly houses, and sets the footprint libraries, design rules and CAD standards the wider team works to.

Hybrid Permanent

Senior Characterization Engineer

Last month

Semtech Bristol

Lead bench PVT characterization for high-speed optical and electrical signal integrity products, developing automated test environments and analyzing complex datasets. Work with an international team across the UK, Canada, US and Mexico, using Python automation and mentoring junior engineers in a lab-based NPI role.

Hybrid

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Senior Electronics Engineer

2 weeks ago

IonQ Oxford

Owns the full lifecycle of electrical reliability fixes on operational trapped-ion quantum computers, from triaging and root-causing control and drive-electronics faults to designing, prototyping and retrofitting permanent solutions. Works across Operations, Science and Manufacturing on fleet-wide upgrades, standardising hardware and building telemetry to reduce downtime.

Hybrid Clearance Required
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Senior QPU Design Engineer

2 weeks ago

IonQ Oxford

Integrate all features needed to operate quantum computers into complex multi-layer ion-trapping chips, guiding designs from requirements through layout and tape-out. Work closely with scientists and fabrication engineers on metal-track routing and photonics/CMOS interfaces, using GDSFactory in Python and Cadence. Hybrid role, three days per week in the Oxford office.

Hybrid Clearance Required

Senior Staff CAD Engineer

4 days ago

Renesas Electronics Swindon

Provides technical leadership for a global EDA/CAD compute and engineering infrastructure, spanning Linux environments, LSF batch compute, EDA license servers, Perforce and project/workspace provisioning. Combines hands-on Python and shell automation with architecture, monitoring and capacity planning, working across engineering, CAD and IT/IS teams to keep semiconductor development environments consistent and reliable worldwide.

Hybrid Permanent

Senior Staff CAD Engineer

4 days ago

Renesas Electronics Edinburgh

Provides technical leadership for a global EDA/CAD compute and engineering infrastructure, spanning Linux environments, LSF batch compute, EDA license servers, Perforce and project/workspace provisioning. Combines hands-on engineering with architecture and operational ownership, building Python and shell automation, monitoring dashboards and capacity planning. Works across engineering, CAD and IT/IS teams to keep environments scalable and globally consistent for semiconductor development.

Hybrid Permanent

Mainframe Technical Consultant - Mainframe AIOPS

3 months ago

Broadcom United Kingdom-Remote Location

Delivers technical consulting on IBM Mainframe AIOps and automation, covering WLM, System Automation, Omegamon, CA-Sysview, CA OPS/MVS and Netmaster. Works with sales teams on qualification, complex demos, proofs of concept and solution architecture, acting as a subject matter expert for customers and partners. Requires deep mainframe experience, European language skills and around 50% travel.

Remote Permanent

Senior Test Engineer — High-Speed Mixed-Signal/RF (V93000, 200Gbps+)

3 weeks ago

Semtech Bristol

Architect test strategies for high-speed mixed-signal and RF SiGe products, from first silicon to mass production, covering 200Gbps+ SerDes, CDRs and signal conditioning. Sets DFT and testability standards, builds reusable test IP, and leads NPI transfers to high-volume OSATs while mentoring engineers.

Hybrid

Senior HW Engineer – Signal and Power Integrity

3 weeks ago

Lumai Oxford

Owns signal and power integrity across high-speed boards and packages, running pre-layout channel studies, post-layout SI analysis with IBIS-AMI models, and PDN impedance and DC drop work for high-current ASIC and FPGA rails. Channels span chip, package, interposer, board and optical engine, with heavy bench correlation using VNAs, TDRs and oscilloscopes to feed design rules.

Hybrid Permanent

Senior Embedded Engineer (RTOS)

5 months ago

Lumai Oxford

Owns embedded software for a novel optical AI accelerator, writing Linux kernel and bare-metal device drivers, firmware for control processors, and deterministic RTOS control tasks. Leads board support package bring-up on new custom silicon revisions, debugging with JTAG, scopes and logic analysers, and sets the embedded team's coding standards and test methodology.

Hybrid Permanent

AI Modelling and Simulation Engineer

Last month

Lumai Oxford

Own a Python-based performance and power modelling framework predicting how photonic AI hardware runs real inference workloads, giving architecture and compiler teams a shared source of truth for latency, throughput and power. Model compute engines, interconnect, memory and bridge interfaces, validate against RTL or emulation, and run benchmarks such as UL Procyon, Geekbench AI and LLMs.

Hybrid Permanent
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Staff Analog Mixed-Signal Design and Modelling Engineer

2 weeks ago

IonQ Oxford

Owns full-chip mixed-signal modelling and verification for cryo-CMOS ASICs used in trapped-ion quantum processors, building Verilog-A/AMS and real-number models correlated against schematic and measured silicon. Leads AMS methodology, sign-off criteria and reviews, runs Cadence AMS/Xcelium-Spectre co-simulation regressions, and mentors engineers through tape-out and bring-up.

Hybrid Clearance Required